1
Ordin Kuo, Ivan Hsiao, John Hull: Computing system with detachable touch screen device. Integrated Device Technology, Kenneth Glass, Stanley J Pawlik, Glass & Associates, April 3, 2012: US08149224 (58 worldwide citation)

A computing system includes a computer device and a detachable touch screen device. The computer device receives input from a touch screen of a detachable touch screen device when the detachable touch screen device is attached to a touch screen port of the computer device and displays an image on a ...


2
Angus David Starr MacAdam: Packet processing in a packet switch with improved output data distribution. Integrated Device Technology, Stanley J Pawlik, Kenneth Glass, Glass & Associates, September 29, 2009: US07596142 (51 worldwide citation)

A packet switch includes a packet processor for processing data packets. The packet processor receives a data packet including a data payload, identifies data portions in the data payload, and determines a destination address for each data portion. Additionally, the packet processor constructs data ...


3
Rino Micheloni, Alessia Marelli, Peter Z Onufryk, Christopher I W Norrie: Nonvolatile memory controller with error detection for concatenated error correction codes. PMC Sierra US, Kenneth Glass, Stanley J Pawlik, Glass & Associates, December 31, 2013: US08621318 (49 worldwide citation)

A nonvolatile memory controller to recover encoded data by performing a hard-decision inner error correction code decoding and an outer error correction code decoding of the data decoded using the hard-decision inner error correction code decoding and then determining if the encoded data has been su ...


4
Al Xuefeng Fang, Chao Xu: System and method for testing a clock circuit. Integrated Device Technology, Stanley J Pawlik, Kenneth Glass, Glass & Associates, July 6, 2010: US07750618 (30 worldwide citation)

A test circuit determines whether a frequency of an output clock signal of a clock circuit is above an output threshold frequency. An input clock signal of the clock circuit is set to an elevated frequency that is higher than a specified frequency. A first counter counts the number of clock cycles o ...


5
Rino Micheloni, Luca Crippa, Alessia Marelli: Error correction code technique for improving read stress endurance. PMC Sierra US, Kenneth Glass, Stanley J Pawlik, Glass & Associates, April 8, 2014: US08694855 (27 worldwide citation)

A data storage device reads a data unit from a memory page, detects a number of data bit errors in the data unit, and generates a bit error indicator identifying bit indexes of the data bit errors in the data unit. The data storage device reads the data unit from the memory page once again and gener ...


6
Chenxiao Ren, Zhongyuan Chang: Clock generator with self-bias bandwidth control. Integrated Device Technology, Stanley J Pawlik, Kenneth Glass, Glass & Associates, September 8, 2009: US07586347 (26 worldwide citation)

A clock generator includes a phase-lock loop for generating an output clock signal based on a reference clock signal. The phase-lock loop includes a charge pump, a low-pass filter, and a self-bias circuit. The low-pass filter generates a bias voltage and the self-bias circuit generates a charge curr ...


7
Chao Xu: Current mode driver with constant voltage swing. Integrated Device Technology, Stanley J Pawlik, Glass & Associates, July 29, 2008: US07405594 (26 worldwide citation)

A current mode driver generates a differential output signal that has a constant voltage swing between a lower voltage level and an upper voltage level. A feedback module determines an intermediate voltage between the lower voltage level and the upper voltage level, compares the intermediate voltage ...


8
Rino Micheloni, Alessia Marelli, Peter Z Onufryk: Shuffler error correction code system and method. PMC Sierra US, Kenneth Glass, Stanley J Pawlik, Glass & Associates, April 8, 2014: US08694849 (25 worldwide citation)

A data storage device stores a data unit in a memory page of a storage block along with an error correction code unit for the data unit. Additionally, the data storage device stores an error correction code unit for the data unit in a memory page of another storage block. In various embodiments, one ...


9
Jagdeep Bal, Tao Jing: Clock circuit with harmonic frequency detector. Integrated Device Technology, Stanley J PAwlik, Kenneth Glass, Glass & Associates, August 31, 2010: US07786763 (24 worldwide citation)

A clock circuit includes a phase-lock loop for generating an output clock signal based on a data signal and a harmonic frequency detector for detecting whether the frequency of the output clock signal is a harmonic frequency of a frequency of a reference clock signal. The harmonic frequency detector ...


10
Ji Fu Chi, Yi Li: Digitally controlled system on-chip (SOC) clock generator. Integrated Device Technology, Stanley J Pawlik, Glass & Associates, August 11, 2009: US07573303 (23 worldwide citation)

A clock generator includes a clock circuit and a voltage-controlled oscillator in a phase-locked loop. The clock circuit monitors input clock signals and selects one of the input clock signals based on characteristics of the input clock signals. The voltage-controlled oscillator generates a referenc ...