An electric device protection circuit comprises at least one conductive bridging unit which electrically connects a terminal of the electric device to a protection node set to a protection potential, the protection potential being chosen such that the conductive bridging unit switches from a resisti ...
Embodiments of the invention relate generally to integrated circuits, to a method for manufacturing an integrated circuit, to a method for decreasing the influence of magnetic fields, and to a memory module. In an embodiment of the invention, an integrated circuit having a magnetic tunnel junction i ...
Methods of manufacturing MTJ memory cells and structures thereof. A diffusion barrier is disposed between an anti-ferromagnetic layer and a pinned layer of an MTJ memory cell to improve thermal stability of the MTJ memory cell. The diffusion barrier may comprise an amorphous material or a NiFe alloy ...
A method for controlling the constant power dissipation of a memory cell includes initially measuring the resistance of the memory cell, and subsequently controlling a source to apply a variable level of current or voltage to the memory cell. The variable level of the applied current or voltage is d ...
A solid state electrolyte memory structure includes a solid state electrolyte layer, a metal layer on the solid state electrolyte layer, and an etch stop layer on the metal layer.
According to one embodiment, an integrated circuit includes an arrangement of memory cells. Each memory cell is connected to a programming current path used for programming the memory cell, and a sensing current path used for sensing the memory state of the memory cell. The programming current path ...
Embodiments of the invention relate generally to integrated circuits, to methods for operating an integrating circuit, and to memory modules. In an embodiment of the invention, an integrated circuit having a magnetic random access memory cell is provided. The magnetic random access memory cell may i ...
A method and apparatus for homogeneously magnetizing an exchange-coupled layer system of a digital magnetic memory cell device comprising an AAF layer system and an antiferromagnetic layer that exchange-couples a layer of the AAF layer system, characterized in that, given a defined direction of magn ...
An arrangement of magnetic liners for the bit lines or word lines of an MRAM device that reduces or eliminates stray magnetic fields at the ends of the magnetic liners, thereby reducing the occurrence of offset fields over portions of the MRAM device due to the magnetic liners is described. The orie ...
According to an embodiment, an integrated circuit includes a magneto-resistive memory cell. The magneto-resistive memory cell includes: a first ferromagnetic layer; a second ferromagnetic layer; and a nonmagnetic layer being disposed between the first ferromagnetic layer and the second ferromagnetic ...