1
Ulrich Klostermann
Alexander Duch, Ulrich Klostermann, Michael Kund: Electric device protection circuit and method for protecting an electric device. Qimonda, ALTIS Semiconductor SNC, Slater & Matsil L, July 6, 2010: US07751163 (39 worldwide citation)

An electric device protection circuit comprises at least one conductive bridging unit which electrically connects a terminal of the electric device to a protection node set to a protection potential, the protection potential being chosen such that the conductive bridging unit switches from a resisti ...


2
Ulrich Klostermann
Rainer Leuschner, Ulrich Klostermann: Integrated circuits; method for manufacturing an integrated circuit; method for decreasing the influence of magnetic fields; memory module. Qimonda, ALTIS Semiconductor SNC, Slater & Matsil L, April 13, 2010: US07697322 (26 worldwide citation)

Embodiments of the invention relate generally to integrated circuits, to a method for manufacturing an integrated circuit, to a method for decreasing the influence of magnetic fields, and to a memory module. In an embodiment of the invention, an integrated circuit having a magnetic tunnel junction i ...


3
Ulrich Klostermann
Stephen L Brown, Arunava Gupta, Ulrich Klostermann, Stuart Stephen Papworth Parkin, Wolfgang Raberg, Mahesh Samant: Magnetic tunnel junctions for MRAM devices. Infineon Technologies, International Business Machines Corporation, Slater & Matsil L, December 12, 2006: US07149105 (18 worldwide citation)

Methods of manufacturing MTJ memory cells and structures thereof. A diffusion barrier is disposed between an anti-ferromagnetic layer and a pinned layer of an MTJ memory cell to improve thermal stability of the MTJ memory cell. The diffusion barrier may comprise an amorphous material or a NiFe alloy ...


4
Ulrich Klostermann
Ulrich Klostermann, Dietmar Gogl: System and method for controlling constant power dissipation. Infineon Technologies, Altis Semiconductor, Slater & Matsil L, August 12, 2008: US07411854 (9 worldwide citation)

A method for controlling the constant power dissipation of a memory cell includes initially measuring the resistance of the memory cell, and subsequently controlling a source to apply a variable level of current or voltage to the memory cell. The variable level of the applied current or voltage is d ...


5
Ulrich Klostermann
Chanro Park, Wolfgang Raberg, Ulrich Klostermann: Memory structure and method of manufacture. Infineon Technologies, Atlis Semiconductor, Slater & Matsil L, September 9, 2008: US07423282 (5 worldwide citation)

A solid state electrolyte memory structure includes a solid state electrolyte layer, a metal layer on the solid state electrolyte layer, and an etch stop layer on the metal layer.


6
Ulrich Klostermann
Ulrich Klostermann: Integrated circuit, memory cell, memory module, method of operating an integrated circuit, and method of manufacturing a memory cell. Qimonda, ALTIS Semiconductor SNC, Slater & Matsil L, April 13, 2010: US07697313 (3 worldwide citation)

According to one embodiment, an integrated circuit includes an arrangement of memory cells. Each memory cell is connected to a programming current path used for programming the memory cell, and a sensing current path used for sensing the memory state of the memory cell. The programming current path ...


7
Ulrich Klostermann
Ulrich Klostermann: Integrated circuits; methods for operating an integrating circuit; memory modules. Qimonda, Altis Semiconductor SNC, Slater & Matsil L, October 13, 2009: US07602637 (2 worldwide citation)

Embodiments of the invention relate generally to integrated circuits, to methods for operating an integrating circuit, and to memory modules. In an embodiment of the invention, an integrated circuit having a magnetic random access memory cell is provided. The magnetic random access memory cell may i ...


8
Ulrich Klostermann
Hubert Brueckl, Ulrich Klostermann, Joachim Wecker: Method for homogeneously magnetizing an exchange-coupled layer system of a digital magnetic memory location device. Infineon Technologies, Slater & Matsil L, July 11, 2006: US07075814 (1 worldwide citation)

A method and apparatus for homogeneously magnetizing an exchange-coupled layer system of a digital magnetic memory cell device comprising an AAF layer system and an antiferromagnetic layer that exchange-couples a layer of the AAF layer system, characterized in that, given a defined direction of magn ...


9
Ulrich Klostermann
Ulrich Klostermann: Magnetoresistive random access memory device with alternating liner magnetization orientation. Qimonda, ALTIS Semiconductor SNC, Slater & Matsil L, February 16, 2010: US07663198

An arrangement of magnetic liners for the bit lines or word lines of an MRAM device that reduces or eliminates stray magnetic fields at the ends of the magnetic liners, thereby reducing the occurrence of offset fields over portions of the MRAM device due to the magnetic liners is described. The orie ...


10
Ulrich Klostermann
Wolfgang Raberg, Ulrich Klostermann: Memory cell using spin induced switching effects. Qimonda, ALTIS Semiconductor SNC, Slater & Matsil L, May 11, 2010: US07715225

According to an embodiment, an integrated circuit includes a magneto-resistive memory cell. The magneto-resistive memory cell includes: a first ferromagnetic layer; a second ferromagnetic layer; and a nonmagnetic layer being disposed between the first ferromagnetic layer and the second ferromagnetic ...



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