1
Chine Gie Lou: Method for forming a shallow trench isolation. Taiwan Semiconductor Manufacturing Company, George O Saile, Stephen B Ackerman, Sevgin Oktay, June 11, 2002: US06403486 (126 worldwide citation)

A method is disclosed to form a shallow trench isolation (STI) without reverse short channel effect. This is accomplished by forming oxidized polysilicon spacers in the dielectric layers above the trench, while also employing a thermal oxide liner on the inside walls of the trench in the substrate. ...


2
Ng Chun Ing, Christopher Neo Tong Teng: Method of monitoring and displaying health performance of an aircraft engine. Singapore Technologies Aerospace, George O Saile, Stephen B Ackerman, Sevgin Oktay, April 29, 2003: US06556902 (42 worldwide citation)

A method of monitoring and displaying health performance of an aircraft engine is disclosed. The method comprises the steps of: (a) sensing engine parameters at operable positions of the aircraft engine; (b) recording and generating continuous output signals reflective of the current behavior of the ...


3
Chung Shi Liu, Chen Hua Yu: Method to improve copper process integration. Taiwan Semiconductor Manufacturing Company, George O Saile, Stephen B Ackerman, Sevgin Oktay, May 28, 2002: US06395642 (42 worldwide citation)

A method is disclosed to improve copper process integration in the forming copper interconnects in integrated circuits. This is accomplished by integrating the process of forming a copper seed layer in an interconnect structure such as a trench or a groove, with the process of plasma cleaning of the ...


4
Licheng M Han, Xu Yi, Joseph Zhifeng Xie, Mei Sheng Zhou, Simon Chooi: Use of boron carbide as an etch-stop and barrier layer for copper dual damascene metallization. Chartered Semiconductor Manufacturing, Institute of Microelectronics, George O Saile, Rosemary L S Pike, Sevgin Oktay, July 23, 2002: US06424044 (35 worldwide citation)

A method of forming a boron carbide layer for use as a barrier and an etch-stop layer in a copper dual damascene structure, and the structure itself are disclosed. In addition to providing a good barrier to copper diffusion, good insulating properties, high etch selectivity with respect to dielectri ...


5
Chia Ta Hsieh, Hung Cheng Sung, Yai Fen Lin, Jack Yeh, Di Son Kuo: Method to fabricate split-gate with self-aligned source and self-aligned floating gate to control gate. Taiwan Semiconductor Manufacturing Company, George O Saile, Stephen B Ackerman, Sevgin Oktay, May 8, 2001: US06228695 (32 worldwide citation)

A split-gate flash memory cell having self-aligned source and floating gate self-aligned to control gate is disclosed as well as a method of forming the same. This is accomplished by depositing over a gate oxide layer on a silicon substrate a poly-1 layer to form a vertical control gate followed by ...


6
Mo Chiun Yu, Wei Ming Chen: Method of generating multiple oxide thicknesses by one oxidation step using NH3 nitridation followed by re-oxidation. Taiwan Semiconductor Manufacturing Company, George O Saile, Stephen B Ackerman, Sevgin Oktay, May 1, 2001: US06225167 (29 worldwide citation)

A method is disclosed to form a plurality of oxides of different thicknesses with one step oxidation. In a first embodiment, a substrate is provided having a high-voltage cell area and a peripheral low-voltage logic area separated by a trench isolation region. The substrate is first nitrided. Then t ...


7
Simon Chooi, Subhash Gupta, Mei Sheng Zhou, Sangki Hong: Composite silicon-metal nitride barrier to prevent formation of metal fluorides in copper damascene. Chartered Semiconductor Manufacturing, George O Saile, Rosemary L S Pike, Sevgin Oktay, April 16, 2002: US06372636 (27 worldwide citation)

A method of forming amorphous silicon spacers followed by the forming of metal nitride over the spacers in a copper damascene structure -single, dual, or multi-structure- is disclosed in order to prevent the formation of fluorides in copper. In a first embodiment, the interconnection between the cop ...


8
Damir Ismailov: Trigger-mode distributed wave oscillator system. Waveworks, Oktay Enterprises Int l, Sevgin Oktay, June 22, 2010: US07741921 (25 worldwide citation)

A Trigger-Mode Distributed Wave Oscillator that provides accurate multiple phases of an oscillation and a method of use of the same. An auxiliary oscillator triggers an oscillation on independent conductor loops or rings forming a differential transmission medium for the oscillation wave. Once the o ...


9
Weng Chang, Lain Jong Li, Shwang Ming Jeng, Syun Ming Jang: Method to reduce via poison in low-k Cu dual damascene by UV-treatment. Taiwan Semiconductor Manfacturing Company, George O Saile, Stephen B Ackerman, Sevgin Oktay, November 20, 2001: US06319809 (25 worldwide citation)

A method to reduce via poisoning in low-k copper dual damascene interconnects through ultraviolet (UV) irradiation of the damascene structure is disclosed. This is accomplished by irradiating the insulative layers each time the layers are etched to form a portion of the damascene structure. Thus, ir ...


10
Chia Ta Hsieh, Yai Fen Lin, Di Son Kuo, Hung Cheng Sung, Jack Yeh: Method to increase coupling ratio of source to floating gate in split-gate flash. Taiwan Semiconductor Manufacturing Company, George O Saile, Stephen B Ackerman, Sevgin Oktay, April 30, 2002: US06380583 (22 worldwide citation)

A split-gate flash memory cell having a three-dimensional source capable of three-dimensional coupling with the floating gate of the cell, as well as a method of forming the same are provided. This is accomplished by first forming an isolation trench, lining it with a conformal oxide, then filling w ...