1
Katherina Babich
Katherina E Babich, Roy Arthur Carruthers, Timothy Joseph Dalton, Alfred Grill, Jeffrey Curtis Hedrick, Christopher Vincent Jahnes, Ebony Lynn Mays, Laurent Perraud, Sampath Purushothaman, Katherine Lynn Saenger: Multilayer interconnect structure containing air gaps and method for making. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Robert M Trepp Esq, August 29, 2006: US07098476 (16 worldwide citation)

A novel air-gap-containing interconnect wiring structure is described incorporating a solid low-k dielectric in the via levels, and a composite solid plus air-gap dielectric in the wiring levels. Also provided is a method for forming such an interconnect structure. The method is readily scalable to ...


2
Eb Eshun
Douglas D Coolbaugh, Ebenezer E Eshun, Zhong Xiang He, William J Murphy, Vidhya Ramachandran: Inexpensive method of fabricating a higher performance capacitance density MIMcap integrable into a copper interconnect scheme. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Anthony J Canale, October 16, 2007: US07282404 (6 worldwide citation)

A method to integrate MIM capacitors into conductive interconnect levels, with low cost impact, and high yield, reliability and performance than existing integration methods is provided. This is accomplished by recessing a prior level dielectric for MIM capacitor level alignment followed by depositi ...


3
Eb Eshun
Anil K Chinthakindi, Ebenezer E Eshun: Thin film resistor with current density enhancing layer (CDEL). International Business Machines Corporation, Scully Scott Murphy & Presser P C, Lisa U Jaklitsch, September 18, 2007: US07271700 (5 worldwide citation)

A thin film resistor device and method of manufacture includes a layer of a thin film conductor material and a current density enhancing layer (CDEL). The CDEL is an insulator material adapted to adhere to the thin film conductor material and enables the said thin film resistor to carry higher curre ...


4
Eb Eshun
Douglas D Coolbaugh, Ebenezer E Eshun, Ephrem G Gebreselasie, Zhong Xiang He, Herbert Lei Ho, Deok kee Kim, Chandrasekharan Kothandaraman, Dan Moy, Robert Mark Rassel, John Matthew Safran, Kenneth Jay Stein, Norman Whitelaw Robson, Ping Chuan Wang, Hongwen Yan: Metal gate integration structure and method including metal fuse, anti-fuse and/or resistor. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Yuanmin Cai, April 17, 2012: US08159040 (5 worldwide citation)

A semiconductor structure and a method for fabricating the semiconductor structure provide a field effect device located and formed upon an active region of a semiconductor substrate and at least one of a fuse structure, an anti-fuse structure and a resistor structure located and formed at least in ...


5
Eb Eshun
Roger A Booth Jr, Douglas D Coolbaugh, Ebenezer E Eshun, Zhong Xiang He: Interdigitated vertical parallel capacitor. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Katherine S Brown, February 19, 2013: US08378450 (4 worldwide citation)

An interdigitated structure may include at least one first metal line, at least one second metal line parallel to the at least one first metal line and separated from the at least one first metal line, and a third metal line contacting ends of the at least one first metal line and separated from the ...


6
Eb Eshun
Thomas A Wallner, Ebenezer E Eshun, Daniel J Jaeger, Phung T Nguyen: Method of forming bipolar transistor integrated with metal gate CMOS devices. International Business Machines Corporation, Scully Scott Murphy & Presser P C, H Daniel Schnurmann, March 6, 2012: US08129234 (4 worldwide citation)

A high-k gate dielectric layer and a metal gate layer are formed and patterned to expose semiconductor surfaces in a bipolar junction transistor region, while covering a CMOS region. A disposable material portion is formed on a portion of the exposed semiconductor surfaces in the bipolar junction tr ...


7
Eb Eshun
Douglas D Coolbaugh, Ebenezer E Eshun, Zhong Xiang He, William J Murphy, Vidhya Ramachandran: Inexpensive method of fabricating a higher performance capacitance density MIMcap integrable into a copper interconnect scheme. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Anthony J Canale, March 30, 2010: US07687867 (3 worldwide citation)

A method to integrate MIM capacitors into conductive interconnect levels, with low cost impact, and high yield, reliability and performance than existing integration methods is provided. This is accomplished by recessing a prior level dielectric for MIM capacitor level alignment followed by depositi ...


8
Eb Eshun
Ebenezer E Eshun, Jeffrey B Johnson, Richard A Phelps, Robert M Rassel, Michael J Zierak: Junction field effect transistor with a hyperabrupt junction. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Richard Kotulak Esq, November 2, 2010: US07825441 (3 worldwide citation)

A junction field effect transistor (JFET) has a hyperabrupt junction layer that functions as a channel of a JFET. The hyperabrupt junction layer is formed by two dopant profiles of opposite types such that one dopant concentration profile has a peak concentration depth at a tail end of the other dop ...


9
Eb Eshun
Anil K Chinthakindi, Douglas D Coolbaugh, Ebenezer E Eshun, John E Florkey, Robert M Rassel, Kunal Vaed: Polysilicon containing resistor with enhanced sheet resistance precision and method for fabrication thereof. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Joseph P Abate Esq, April 6, 2010: US07691717 (3 worldwide citation)

A polysilicon containing resistor includes: (1) a p dopant selected from the group consisting of boron and boron difluoride; and (2) an n dopant selected from the group consisting of arsenic and phosphorus. Each of the p dopant and the n dopant has a dopant concentration from about 1e18 to about 1e2 ...


10
Eb Eshun
Ebenezer E Eshun, Steven H Voldman: High tolerance TCR balanced high current resistor for RF CMOS and RF SiGe BiCMOS applications and cadenced based hierarchical parameterized cell design kit with tunable TCR and ESD resistor ballasting feature. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Anthony J Canale, May 24, 2011: US07949983 (2 worldwide citation)

A resistor device structure and method of manufacture therefore, wherein the resistor device structure invention includes a plurality of alternating conductive film and insulative film layers, at least two of the conductive film layers being electrically connected in parallel to provide for high cur ...



Click the thumbnails below to visualize the patent trend.