1
Katherina Babich
Scott D Allen, Katherina E Babich, Steven J Holmes, Arpan P Mahorowala, Dirk Pfeiffer, Richard Stephan Wise: Techniques for patterning features in semiconductor devices. International Business Machines Corporation, Ryan Mason & Lewis, Daniel P Morris, April 18, 2006: US07030008 (8 worldwide citation)

Techniques for semiconductor processing are provided. In one aspect, a method for patterning one or more features in a semiconductor device comprises the following step. At least one critical dimension of the one or more features is reduced during etching of the antireflective material. A lithograph ...


2
Katherina Babich
Katherina Babich, Arpan P Mahorowala, David R Medeiros, Dirk Pfeiffer: Lithographic antireflective hardmask compositions and uses thereof. International Business Machines Corporation, Ryan Mason & Lewis, Daniel P Morris Esq, May 29, 2007: US07223517 (7 worldwide citation)

Compositions and techniques for the processing of semiconductor devices are provided. In one aspect of the invention, an antireflective hardmask composition is provided. The composition comprises a fully condensed polyhedral oligosilsesquioxane, {RSiO1.5}n, wherein n equals 8; and at least one chrom ...


3
Katherina Babich
Katherina Babich, Elbert Huang, Arpan P Mahorowala, David R Medeiros, Dirk Pfeiffer, Karen Temple: Antireflective hardmask and uses thereof. International Business Machines Corporation, Ryan Mason & Lewis, January 19, 2010: US07648820 (4 worldwide citation)

Antireflective hardmask compositions and techniques for the use of antireflective hardmask compositions for processing of semiconductor devices are provided. In one aspect of the invention, an antireflective hardmask layer for lithography is provided. The antireflective hardmask layer comprises a ca ...


4
Katherina Babich
Katherina Babich, Elbert Huang, Arpan P Mahorowala, David R Medeiros, Dirk Pfeiffer, Karen Temple: Antireflective hardmask and uses thereof. International Business Machines Corporation, Ryan Mason & Lewis, Daniel P Morris Esq, February 6, 2007: US07172849 (4 worldwide citation)

Antireflective hardmask compositions and techniques for the use of antireflective hardmask compositions for processing of semiconductor devices are provided. In one aspect of the invention, an antireflective hardmask layer for lithography is provided. The antireflective hardmask layer comprises a ca ...


5
Katherina Babich
Scott D Allen, Katherina E Babich, Steven J Holmes, Arpan P Mahorowala, Dirk Pfeiffer, Richard Stephan Wise: Techniques for patterning features in semiconductor devices. International Business Machines Corporation, Daniel P Morris Esq, Ryan Mason & Lewis, June 9, 2009: US07545041 (3 worldwide citation)

Techniques for semiconductor processing are provided. In one aspect, a method for patterning one or more features in a semiconductor device comprises the following step. At least one critical dimension of the one or more features is reduced during etching of the antireflective material. A lithograph ...


6
Ulrich Klostermann
Philip Louis Trouilloud, Ulrich Klostermann: Field ramp down for pinned synthetic antiferromagnet. International Business Machines Corporation, Infineon Technologies North America, Ryan Mason & Lewis, June 13, 2006: US07061787 (3 worldwide citation)

Techniques for processing magnetic devices are provided. In one aspect, a method of processing a magnetic device including two or more anti-parallel coupled layers comprises the following steps. A magnetic field is applied in a given direction to orient a direction of magnetization of the two or mor ...


7
Ulrich Klostermann
Daniel Christopher Worledge, Ulrich Klostermann: Techniques for reducing Neel coupling in toggle switching semiconductor devices. International Business Machines Corporation, Infineon Technologies North America, Ryan Mason & Lewis, July 25, 2006: US07081658 (1 worldwide citation)

The present invention provides techniques for data storage. In one aspect of the invention, a semiconductor device is provided. The semiconductor device comprises at least one free layer and at least one fixed layer, with at least one barrier layer therebetween. At least one pinned magnetic layer is ...


8
Katherina Babich
Scott D Allen, Katherina E Babich, Steven J Holmes, Arpan P Mahorowala, Dirk Pfeiffer, Richard Stephan Wise: Techniques for Patterning Features in Semiconductor Devices. International Business Machines Corporation, Ryan Mason & Lewis, August 7, 2008: US20080187731-A1

Techniques for semiconductor processing are provided. In one aspect, a method for patterning one or more features in a semiconductor device comprises the following step. At least one critical dimension of the one or more features is reduced during etching of the antireflective material. A lithograph ...


9
Katherina Babich
Scott D Allen, Katherina E Babich, Steven J Holmes, Arpan P Mahorowala, Dirk Pfeiffer, Richard Stephan Wise: Techniques for patterning features in semiconductor devices. International Business Machines Corporation, Ryan Mason & Lewis, June 8, 2006: US20060118785-A1

Techniques for semiconductor processing are provided. In one aspect, a method for patterning one or more features in a semiconductor device comprises the following step. At least one critical dimension of the one or more features is reduced during etching of the antireflective material. A lithograph ...


10
Katherina Babich
Katherina E Babich, Elbert Huang, Arpan P Mahorowala, David R Medeiros, Dirk Pfeiffer, Karen Temple: Antireflective Hardmask and Uses Thereof. International Business Machines Corporation, Ryan Mason & Lewis, May 10, 2007: US20070105363-A1

Antireflective hardmask compositions and techniques for the use of antireflective hardmask compositions for processing of semiconductor devices are provided. In one aspect of the invention, an antireflective hardmask layer for lithography is provided. The antireflective hardmask layer comprises a ca ...