1
Robert J Gove, Keith Balmer, Nicholas K Ing Simmons, Karl M Guttag: Multi-processor reconfigurable in single instruction multiple data (SIMD) and multiple instruction multiple data (MIMD) modes and method of operation. Texas Instruments Incorporated, Robert D Marshall Jr, James C Kesterson, Richard L Donaldson, May 18, 1993: US05212777 (375 worldwide citation)

There is disclosed a multiprocessor system arranged, in one embodiment, as an image and graphics processor. The processor is structured with several individual processors all having communication links to several memories without restriction. A crossbar switch serves to establish the processor memor ...


2

3
John Ling Wing So: Bus bridge device including data bus of first width for a first processor, memory controller, arbiter circuit and second processor having a different second data width. Texas Instruments Incorporated, Robert D Marshall Jr, Gerald E Laws, Richard L Donaldson, June 1, 1999: US05909559 (311 worldwide citation)

An integrated circuit (2210) provides on a single chip for use with a first processor (106) off-chip, the following combination: first terminals (of 2232) for first processor-related signals and defining a first data width (32-bit), second terminals for external bus-related signals (PCI), third term ...


4
Nicholas K Ing Simmons, Karl M Guttag, Robert J Gove, Keith Balmer: Dual mode SIMD/MIMD processor providing reuse of MIMD instruction memories as data memories when operating in SIMD mode. Texas Instruments Incorporated, Robert D Marshall Jr, James C Kesterson, Richard L Donaldson, August 24, 1993: US05239654 (281 worldwide citation)

A multi-processor system and method arranged, in one embodiment, as an image and graphics processor. The multiprocessor system includes several individual processors all having communication links to several memories. Additional instruction memories are dedicated individually as cache memories to pa ...


5
Robert J Gove, Karl M Guttag, Keith Balmer, Nicholas K Ing Simmons: Multi-processor with crossbar link of processors and memories and method of operation. Texas Instruments Incorporated, Robert D Marshall Jr, James C Kesterson, Richard L Donaldson, November 28, 1995: US05471592 (280 worldwide citation)

There is disclosed a multiprocessor system and method arranged, in one embodiment, as an image and graphics processor. The processor is structured with several individual processors all having communication links to several memories without restriction. A crossbar switch serves to establish the proc ...


6
Walter C Bonneau Jr: Personal identification. Texas Instruments Incorporated, Robert D Marshall Jr, James C Kesterson, Richard L Donaldson, December 3, 1996: US05581630 (269 worldwide citation)

A portable optical media imaging system for use in personal identification includes: a portable optical media card (13); an optical reader (34), having circuitry for reading information from the portable optical media card (13); an image scanner (30); an image system processor (31), including an enc ...


7

8
Robert J Gove, Keith Balmer, Nicholas K Ing Simmons, Karl M Guttag: Reconfigurable SIMD/MIMD processor using switch matrix to allow access to a parameter memory by any of the plurality of processors. Texas Instruments Incorporated, Robert D Marshall Jr, James C Kesterson, Richard L Donaldson, March 18, 1997: US05613146 (218 worldwide citation)

There is disclosed a multiprocessor system and method arranged, in one embodiment, as an image and graphics processor. The processor is structured with several individual processors all having communication links to several memories without restriction. A crossbar switch serves to establish the proc ...


9
Robert J Gove, Keith Balmer, Nicholas K Ing Simmons, Karl M Guttag: Reconfigurable multi-processor operating in SIMD mode with one processor fetching instructions for use by remaining processors. Texas Instruments Incorporated, Robert D Marshall Jr, James C Kesterson, Richard L Donaldson, May 28, 1996: US05522083 (206 worldwide citation)

There is disclosed a multiprocessor system and method arranged, in one embodiment, as an image and graphics processor. The processor is structured with several individual processors all having communication links to several memories without restriction. A crossbar switch serves to establish the proc ...


10
Robert J Gove, Keith Balmer, Nicholas Kerin Ing Simmons, Karl Marion Guttag: Reduced area of crossbar and method of operation. Texas Instruments Incorporated, Robert D Marshall Jr, James C Kesterson, Richard L Donaldson, June 16, 1998: US05768609 (195 worldwide citation)

There is disclosed a multi-processor system and method arranged, in one embodiment, as an image and graphics processor. The image processor is structured with several individual processors all having communication links to several memories. A crossbar switch serves to establish the processor memory ...