1
Patricia M McCown, Timothy J Conway, Karl M Jessen: Methods and apparatus for monitoring system performance. Allied Signal, Christopher N Malvone, Howard G Massung, Robert A Walsh, November 19, 1991: US05067099 (233 worldwide citation)

Method and apparatus for performing system monitoring and diagnostics is disclosed. In performing system monitoring, data is acquired from the system under test and compared to an event model. The event model comprises a database having event records which pre-define events which can occur. Each eve ...


2
Claude L Bertin, Erik L Hedberg: High performance, high bandwidth memory bus architecture utilizing SDRAMs. International Business Machines Corporation, Robert A Walsh, Whitham Curtis & Whitham, February 9, 1999: US05870350 (195 worldwide citation)

A high performance, high bandwidth memory bus architecture and module. The module may be a card that includes standard synchronous DRAM (SDRAM) chips and reduces latency and pin count. Four bus pins separate input commands from data and establish parallel system operations. By maintaining "packet" t ...


3
George C Correia, John E Cronin, Edmund J Sprogis: Stacked chip process carrier. International Business Machines Corporation, Robert A Walsh Esq, Scully Scott Murphy & Presser, August 28, 2001: US06279815 (168 worldwide citation)

The present invention provides an apparatus and methods for holding a first semiconductor device in proper alignment to a second semiconductor device, whose size is different from the first device, while performing a C4 bond between the two devices. The apparatus for holding the two devices in prope ...


4
Timothy Jay Dell, Mark William Kellogg, Bruce Gerard Hazelzet: SIMM/DIMM memory module. International Business Machines, Francis J Thornton, Robert A Walsh, Thornton & Thornton, August 29, 2000: US06111757 (145 worldwide citation)

A memory module configured such that it can be operated as a first memory module such as a (Single In-line Memory Module) SIMM or as a second memory module such as a (Dual In-linc Memory Module) DIMM module without requiring external switching circuitry. This is accomplished by providing a memory mo ...


5
Christopher Paul Miller, Jim Lewis Rogers, Steven William Tomashot: Cached synchronous DRAM architecture allowing concurrent DRAM operations. International Business Machines Corporation, Robert A Walsh, July 28, 1998: US05787457 (145 worldwide citation)

A cached synchronous dynamic random access memory (cached SDRAM) device having a multi-bank architecture includes a synchronous dynamic random access memory (SDRAM) bank including a row decoder coupled to a memory bank array for selecting a row of data in the memory bank array, sense amplifiers coup ...


6
Patricia M McCown, Timothy J Conway: Methods and apparatus for performing system fault diagnosis. Allied Signal, Christopher N Malvone, Howard G Massung, Robert A Walsh, March 24, 1992: US05099436 (142 worldwide citation)

A diagnostic tool based on a hybrid knowledge representation of a system under test is disclosed. Data collected from the system during its operation is compared to an event based representation of the system which comprises a plurality of predefined events. An event is recognized when the collected ...


7
Brian J Connolly, Mark W Kellogg, Bruce G Hazelzet: High density memory modules with improved data bus performance. International Business Machines Corporation, Robert A Walsh, Whitham Curtis & Whitham, September 1, 1998: US05802395 (132 worldwide citation)

Data line loading on high density modules with multiple DRAMs is minimized permitting the maximum memory density of systems of otherwise limited density to be increased without an ensuing performance degradation due to data line capacitive loading. There are two parts to the solution of reducing dat ...


8
Anthony Michael Palagonia, Paul Joseph Pikna, John Thomas Maddix: Micro probe assembly and method of fabrication. International Business Machines Corporation, Robert A Walsh, May 9, 2000: US06059982 (131 worldwide citation)

A probe assembly including an integral fine probe tip, conductive line with terminal connection for testing semiconductor devices and a method of construction of the probe assembly is described. The method of construction described utilizes the step of etching pits into silicon wafers to produce mol ...


9
Brian J Connolly, Bruce G Hazelzet, Mark W Kellogg: High density memory module with in-line bus switches being enabled in response to read/write selection state of connected RAM banks to improve data bus performance. International Business Machines Corporation, Robert A Walsh Esq, Whitman Curtis & Whitham, May 30, 2000: US06070217 (115 worldwide citation)

Data line loading on high density modules with multiple DRAMs is minimized permitting the maximum memory density of systems of otherwise limited density to be increased without an ensuing performance degradation due to data line capacitive loading. First the single or dual in-line memory module (SIM ...


10
Joseph A Benenati, Claude L Bertin, William T Chen, Thomas E Dinan, Wayne F Ellis, Wayne J Howell, John U Knickerbocker, Mark V Pierson, William R Tonti, Jerzy M Zalesinski: Rolling ball connector. International Business Machines Corporation, Robert A Walsh, March 19, 2002: US06358627 (106 worldwide citation)

An integrated circuit assembly has pads of a chip electrically connected to pads of a substrate with rolling metal balls. A pliable material bonds the balls in movable contact with pads of the chip and substrate. Because the balls are relatively free to move, thermal expansion differences that would ...