1
Sandra D McNabb, Richard S Yien: Call data collection and modification of received call distribution. American Telephone and Telegraph Company AT & T Laboratories, Richard B Havill, November 29, 1988: US04788718 (239 worldwide citation)

An arrangement and method for compiling telecommunication traffic analysis data includes the steps of collecting call data for a plurality of calls to a single customer from a signaling circuit that commonly carries the signaling for calls to a plurality of customers. The call data is transmitted to ...


2
Richard E Johnson, Dennis D Davis, David R Kee, John W Orcutt, Angus W Hightower: Method of making an integrated circuit using a pre-served dam bar to reduce mold flash and to facilitate flash removal. Texas Instruments Incorporated, Richard B Havill, Melvin Sharp, N Rhys Merrett, December 3, 1991: US05070039 (181 worldwide citation)

A lead from 10 carries an integrated circuit on a die support pad 14. The lead frame has a dam bar including a transverse portion that extends between adjacent leads (20) for limiting mold flash. The dam bar transverse portion 26 is entirely severed from the adjacent leads for final removal by a met ...


3
Adrian E Eckberg Jr, Daniel T Luan, David M Lucantoni, Tibor J Schonfeld: Packet switching system arranged for congestion control. American Telephone and Telegraph Company AT&T Bell Laboratories, Richard B Havill, September 6, 1988: US04769811 (163 worldwide citation)

A method for controlling congestion in a packet switching network uses a packet dropping algorithm to determine when to drop a marked packet wherever the network is congested at any point along the path being traversed by the marked packet.


4
Wilbur C Vogley, Anthony M Balistreri, Karl M Guttag, Steven D Krueger, Duy Loan T Le, Joseph H Neal, Kenneth A Poteet, Joseph P Hartigan, Roger D Norwood: System including a data processor, a synchronous dram, a peripheral device, and a system clock. Texas Instruments Incorporated, Richard B Havill, Leo W Heiting, Richard L Donaldson, February 14, 1995: US05390149 (147 worldwide citation)

A synchronous random access memory is arranged to be responsive directly to a system clock signal for operating synchronously with the associated microprocessor. The synchronous random access memory is further arranged to either write-in or read out data in a synchronous burst operation or synchrono ...


5
Adrian E Eckberg Jr, Daniel T Luan, David M Lucantoni, Tibor J Schonfeld: Packet switching system arranged for congestion control through bandwidth management. American Telephone and Telegraph Company AT&T Bell Laboratories, Richard B Havill, September 6, 1988: US04769810 (144 worldwide citation)

In a packet switching network, packet monitoring and marking algorithms are used for determining which data packets, received from a customer by an access node, are being transmitted at an excessive transmission rate and accordingly are marked. Additionally every packet from a special customer can b ...


6
Kotikalapudi Sriram: Bandwidth allocation and congestion control scheme for an integrated voice and data network. American Telephone and Telegraph Company, AT&T Bell Laboratories, Richard B Havill, April 3, 1990: US04914650 (131 worldwide citation)

An integrated voice and data network includes a multiplexer arranged with a voice queue for storing voice packets and a data queue for storing data packets. Voice packets are transmitted for a predetermined interval T1. Data packets are transmitted for a predetermined interval T2. The predetermined ...


7
Andrew L Heilveil, Jerry R VanAken, Karl M Guttag, Donald J Redwine, Raymond Pinkham, Mark F Novak: Video display system using memory with parallel and serial access employing serial shift registers selected by column address. Texas Instruments Incorporated, Richard B Havill, Lawrence J Bassuk, Richard L Donaldson, November 10, 1992: US05163024 (129 worldwide citation)

In a video-type computer system and the like, an improved memory circuit is provided for adapting the system to CRT screens having different resolutions. The memory circuit includes a bit-mapped RAM unit or chip having sufficient cells to accommodate any CRT screen sought to be used, and also a seri ...


8
Allan T Mitchell, Bert R Riemenschneider: Non-volatile semiconductor memory. Texas Instruments Incorporated, Richard B Havill, Leo N Heiting, Richard L Donaldson, December 1, 1992: US05168334 (127 worldwide citation)

A small-area single-transistor EEPROM memory cell includes buried bit lines (44,46) extending through the array and connecting together many memory cells. Formed above a channel area (25) and between the bit lines (44,46) are oxide-nitride-oxide layers (50,52,54) for providing isolation between over ...


9
Michael C Stephens Jr: Method and apparatus for preventing invalid operating modes and an application to synchronous memory devices. Texas Instruments, Richard B Havill, Richard L Donaldson, January 31, 1995: US05386385 (125 worldwide citation)

A synchronous memory device is provided in which a timing and control circuit (28) receives timing and control inputs. A row address buffer (38) and row decoders (40 and 42) operate to enable rows in plural memory sections (30, 32, 34, and 36). Column decoders (58, 60, 62, and 64) operate to enable ...


10
Richard E Wagner: Devices for monitoring, switching, attenuating or distributing light. Bell Telephone Laboratories Incorporated, Richard B Havill, December 4, 1979: US04176908 (74 worldwide citation)

An access port, a basic building block for optical devices, is formed by joining the ends of two fibers. Each fiber has a wedge-shaped end portion with two planar sides. One planar side of one end portion is held against one planar side of the other end portion. The other planar side of each end por ...



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