1
David E Cushing, Steven A Tague: Microprogrammable floating point arithmetic unit capable of performing arithmetic operations on long and short operands. Honeywell Information Systems, Faith F Driscoll, Nicholas Prasinos, Ronald T Reiling, July 17, 1979: US04161784 (197 worldwide citation)

A scientific processing unit includes a microprogrammable arithmetic processing apparatus for performing floating point arithmetic operations with operands in long and short form. The apparatus includes a microprogrammable control section and a plurality of microprocessor arithmetic and logic unit c ...


2
David R Bourgeois, James A Ryan, Subhash C Varshney: Data processing system with self testing and configuration mapping capability. Honeywell Information Systems, Nicholas Prasinos, June 8, 1982: US04334307 (155 worldwide citation)

A data processing system employing firmware for executing a self test routine each time the system goes through the power-up cycle. The self test firmware provides for compilation of a system configuration map during each execution so that configuration and status data is made available for accessin ...


3
Jaime Calle, Victor Michael Griswold: Balancing the utilization of I/O system processors. Honeywell Information Systems, Faith F Driscoll, Nicholas Prasinos, Ronald T Reiling, March 21, 1978: US04080649 (128 worldwide citation)

An input/output system couples to a host processor through a system interface unit and includes at least two input/output processing units and a memory unit. The system interface unit includes interrupt processing logic circuits for each input/output processing unit for processing interrupt requests ...


4
Patrick Dufond, Jean Claude Cassonnet, Jean Louis Bogaert, Philippe Hubert DE Rivet, John J Bradley, Benjamin S Franklin: Process management structures and hardware/firmware control. Compagnie Honeywell Bull, Nicholas Prasinos, Ronald T Reiling, April 11, 1978: US04084228 (113 worldwide citation)

A system and method for computer process dispatching in a multiprogramming/multiprocessing environment is disclosed. Each process in the multiprogramming/multiprocessing computer system may be in one of four states at any given time as follows:


5
Ming T Miu, John J Bradley: Program counter stacking method and apparatus for nested subroutines and interrupts. Honeywell Information Systems, William A Linnell, Nicholas Prasinos, December 11, 1984: US04488227 (99 worldwide citation)

A computer system which facilitates the execution of nested subroutines and interrupts is disclosed. As each branch transfer within the program is executed by a control area logic, a microcommand initiates the transfer of the return address, which has been derived from the address in the present rou ...


6
William Panepinto Jr, Chester M Nibby Jr: Memory present apparatus. Honeywell Information Systems, Faith F Driscoll, Nicholas Prasinos, Ronald T Reiling, December 1, 1981: US04303993 (96 worldwide citation)

A memory subsystem includes at least one up to a number of memory module boards identical in layout and construction. The board includes a number of memory chips which are positioned in a number of physical row locations together providing a predetermined number of addressable contiguous memory loca ...


7
Ming T Miu, Virendra S Negi, Richard A Lemay: Synchronization technique for data transfers over an asynchronous common bus network coupling data processing apparatus. Honeywell Information Systems, John S Solakian, Ronald T Reiling, Nicholas Prasinos, September 20, 1977: US04050097 (93 worldwide citation)

Data transfer synchronization is achieved in a data processing system by a transferring unit enabling a clock cycle stall mechanism each time a transfer is attempted, disabling such mechanism upon receipt of a predetermined response from the receiving unit, the mechanism actually producing a clock c ...


8
Jaime Calle, Lawrence W Chelberg: Input/output cache system including bypass capability. Honeywell Information Systems, Faith F Driscoll, Nicholas Prasinos, Ronald T Reiling, February 21, 1978: US04075686 (87 worldwide citation)

A local memory of an input/output system includes a cache store and a backing store. The system includes a plurality of command modules. The cache store provides fast access to blocks of information previously fetched from the backing store in response to memory commands generated by any one of a pl ...


9
Allen C Hirtle, David B O Keefe: Emulation apparatus. Honeywell Information Systems, Faith F Driscoll, Nicholas Prasinos, Ronald T Reiling, April 11, 1978: US04084235 (81 worldwide citation)

A processing unit includes emulation apparatus which operates to execute instructions of a target system, one of a plurality of ways depending upon the options and features of the target system being emulated. The options, features and characteristics of the target system for which the program was o ...


10
Mario G Trinchieri: Apparatus for detecting when the activity of one process in relation to a common piece of information interferes with any other process in a multiprogramming/multiprocessing computer system. Honeywell Information Systems, George Grayson, Nicholas Prasinos, Ronald T Reiling, September 23, 1980: US04224664 (79 worldwide citation)

A multiprogramming/multiprocessing computer system for executing a plurality of processes sharing common information in the form of records, pages or messages, employing an apparatus for avoiding an interference between two processes seeking access to elements of common information. The system opera ...