1
Frank Djennas, Victor K Nomi, John R Pastore, Twila J Reeves, Les Postlethwait: Method for making semiconductor device having no die supporting surface. Motorola, Minh Hien N Clark, December 12, 1995: US05474958 (331 worldwide citation)

A wire bondable plastic encapsulated semiconductor device (58) having no die supporting surface can be manufactured. In one embodiment, a semiconductor die (22) and a plurality of conductors (12) extending toward the periphery of the die are provided. The die is rigidly held in place on a workholder ...


2
Paul T Lin: Leaded semiconductor device having accessible power supply pad terminals. Motorola, Minh Hien N Clark, April 16, 1996: US05508556 (214 worldwide citation)

A semiconductor die (14) is mounted over a power supply surface (24, 52, 62). Signal bonding pads (18) on the die are wire bonded to corresponding leads (38) of a leadframe. Power supply bonding pads (20, 21) on the die are wire bonded to the power supply surface. A package body (22, 42, 56) surroun ...


3
Charles G Bigler, Alan H Woosley, Michael B McShane: Molded carrier ring leadframe having a particular resin injecting area design for gate removal and semiconductor device employing the same. Motorola, Minh Hien N Clark, May 14, 1996: US05517056 (181 worldwide citation)

A leadframe (30) having a novel resin injecting area (44) is disclosed to facilitate and control the removal of a molded gate (18) prior to excising a semiconductor device(70) from a carrier ring (14). The carrier ring has a corner which is on a diagonal with a corner of the package body (12) to for ...


4
Leo M Higgins III: Area array semiconductor device having a lid with functional contacts. Motorola, Minh Hien N Clark, March 1, 1994: US05291062 (169 worldwide citation)

An area array semiconductor device (10) having a lid with functional I/O contacts can be manufactured. In one embodiment, a semiconductor die (12) is mounted in a die cavity (16) of a substrate (14). A plurality of wire bonds (20) connect the die to conductive traces (18) on a surface of the substra ...


5
Paul T Lin, Michael B McShane: Thermally enhanced semiconductor device having exposed backside and method for making the same. Motorola, Minh Hien N Clark, September 12, 1995: US05450283 (163 worldwide citation)

A thermally enhanced semiconductor device (10) having an exposed backside (22) is described. In one embodiment, a PC board substrate (12) is provided having a pattern of conductive traces (14) on both upper and lower surfaces of the substrate. Electrical continuity is maintained between the two surf ...


6
Leo M Higgins III: Semiconductor device having compliant columnar electrical connections. Motorola, Minh Hien N Clark, November 21, 1995: US05468995 (147 worldwide citation)

An array type semiconductor device (10 and 40) has compliant polymer columnar I/O connections (30) to accommodate thermally induced stress during device operation. The device has a semiconductor die (22) mounted to a substrate (12) and electrically connected thereto. A package body (28, 46) covers t ...


7
Stuart E Greer: Method for forming a temporary attachment between a semiconductor die and a substrate using a metal paste comprising spherical modules. Motorola, Minh Hien N Clark, November 21, 1995: US05468655 (96 worldwide citation)

A nodular metal paste (42) is used to temporarily attach the bumps (34) on a semiconductor die (32) to a substrate (38). The spherical nodules (44) composing the metal paste are dispensed onto contact pads (40) on the substrate, and then heated until they partially melt. The partial liquid region pe ...


8
Leo M Higgins III: Method for testing a semiconductor device on a universal test circuit substrate. Motorola, Minh Hien N Clark, January 3, 1995: US05378981 (77 worldwide citation)

A low cost method is used to standardize testing of bare semiconductor devices. In one embodiment, a universal test circuit substrate (10) having an interleaving fan-out pattern of conductive traces (14) is provided. The radial array of conductive traces terminates in a plurality of test pads (16) p ...


9
Paul David Morrison: Hermetic semiconductor device having jumper leads. Motorola, Minh Hien N Clark, January 10, 1995: US05381039 (75 worldwide citation)

A fine-pitch hermetic device (10) can be manufactured wherein two sets of wire bonds (18 & 20) are used to electrically connect a semiconductor die (12) to a leadframe (16). Jumper leads or conductive pads (28) are placed on an inner surface of a ceramic base (14) to electrically interconnect the tw ...


10
Daniel Cavasin: Method for thinning a semiconductor wafer. Motorola, Minh Hien N Clark, December 19, 1995: US05476566 (74 worldwide citation)

Advances in wafer technology and packaging have led to an increase in wafer size while requiring a decrease in wafer thickness. Thickness limitations increase as wafer diameter increases. Thinning a wafer past a certain limit can result in wafer breakage. A laminated semiconductor wafer structure (1 ...