1
John L Matrone: Universal test fixture employing interchangeable wired personalizers. Fairchild Camera & Instrument, Kenneth Olsen, Theodore S Park, Michael J Pollock, September 28, 1982: US04352061 (108 worldwide citation)

A universe of probes is contained within a platen in a spaced-apart, substantially parallel relationship with one another with their tips pointing in the same direction. Each probe is free to move longitudinally between an advanced or test position and a retracted position. The platen nests into a w ...


2
Tamas S Szepesi: Regulated switched power circuit with resonant load. National Semiconductor Corporation, Gail W Woodward, Paul J Winters, Michael J Pollock, August 13, 1985: US04535399 (90 worldwide citation)

A switching circuit is employed to control the flow of energy from a power source to a tuned load. The control is achieved by means of a pulse width control voltage. The load current is sensed and fed to a phase locked loop which contains an oscillator producing an output that is slightly above load ...


3
Hee Wong, Ramanatha V Balakrishnan, Herb O Schneider: Digital PLL decoder. National Semiconductor Corporation, Paul J Winters, Michael J Pollock, Gail Woodward, April 22, 1986: US04584695 (83 worldwide citation)

A digital PLL technique to provide an effective sampling interval and resolution shorter than the driver clock period. A multi-phase driver clock provides a clock signals phase-offset from each other. One clock output signal is used as the driver clock to clock an input sampler. A pattern of bit sam ...


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Antony G Bell, Rajesh H Parekh: EPROM Reliability test circuit. Fairchild Camera & Instrument, Paul J Winters, Theodore Scott Park, Michael J Pollock, February 24, 1981: US04253059 (70 worldwide citation)

On-chip circuitry for measuring the threshold voltage and hence the data retention reliability of the floating gate transistors used in erasable programmable read-only computer memories. Upon the application of a program "verification" signal, an externally adjustable and calibrated voltage ramp is ...


6
Saeed Nasiri: Fiber optic assembly for coupling an optical fiber and a light source. National Semiconductor Corporation, Michael J Pollock, Paul J Winters, Gail W Woodward, February 28, 1984: US04433898 (61 worldwide citation)

A heat molded optical fiber interconnect molds one end of a plastic optical fiber around light emitting surfaces of a light source such as a light emitting diode to provide a highly efficient optical and mechanical coupling between the optical fiber and the light source. In one preferred embodiment ...


7
William I Lehrer: Method for LPCVD co-deposition of metal and silicon to form metal silicide. Fairchild Camera & Instrument, Ken Olsen, Theodore Scott Park, Michael J Pollock, November 16, 1982: US04359490 (56 worldwide citation)

A low temperature LPCVD process for co-depositing metal and silicon to form metal silicide on a surface such as the surface of a semiconductor integrated circuit wherein the metal is selected from the group consisting of tungsten, molybdenum, tantalum and niobium. A reactor which contains the surfac ...


8
Frederick J Smith: Programmable fuse circuit. National Semiconductor Corporation, Gail W Woodward, Paul J Winters, Michael J Pollock, May 1, 1984: US04446534 (53 worldwide citation)

A programmable fuse circuit has a fusable polysilicon element programmable in response to an "illegal" condition on existing pins of an integrated circuit. This programmable fuse circuit is incorporated in a programmable partial memory circuit, a reconfigurable format memory circuit, and a chip sele ...


9
Bidyut K Bose, John M Jorgensen: Fast CMOS buffer for TTL input levels. National Semiconductor Corporation, Gail W Woodward, Paul J Winters, Michael J Pollock, February 7, 1984: US04430582 (48 worldwide citation)

A CMOS integrated circuit is made compatible with TTL input signals. A regulator operates the CMOS gates in an array at a voltage that is slightly lower than the supply. The regulator sense circuit is made responsive to an operating gate and to a TTL bias reference. Accordingly, the regulator will c ...


10
Paul Chu, James B Klingensmith: Interruptible microprogram sequencing unit and microprogrammed apparatus utilizing same. Fairchild Camera & Instrument Corporation, Kenneth Olsen, Michael J Pollock, Theodore Scott Park, August 9, 1983: US04398244 (47 worldwide citation)

An interruptible microprogram sequencing unit (MSU) for providing a sequence of microinstruction addresses to a control memory containing microinstructions for the operation of a microprogrammed apparatus. The MSU includes an address output for providing microinstruction addresses to the control mem ...