1
Maximino Aguilar Jr, Michael Norman Day, Mark Richard Nutter, James Michael Stafford: Managing a plurality of processors as devices. International Business Machines Corporation, VanLeeuwen & VanLeeuwen, Matthew B Talpis, April 21, 2009: US07523157 (84 worldwide citation)

Managing a computer system's multiple processors as devices. The operating system accesses the multiple processors using processor device modules loaded into the operating system to facilitate a communication between an application requesting access to a processor and the processor. A device-like ac ...


2
Robert H Bell Jr, Louis Bennie Capps Jr, Michael Jay Shapiro: Data and control encryption. International Business Machines Corporation, Yee & Associates P C, Matthew B Talpis, February 19, 2013: US08379847 (62 worldwide citation)

Secure communication of data between devices includes encrypting unencrypted data at a first device by reordering unencrypted bits provided in parallel on a device bus, including data and control bits, from an unencrypted order to form encrypted data including a plurality of encrypted bits in parall ...


3
Aaron C Brown, Douglas M Freimuth, Renato J Recio, Steven M Thurber: PCI function south-side data management. International Business Machines Corporation, Stephen J Walder Jr, Matthew B Talpis, June 22, 2010: US07743189 (37 worldwide citation)

A hypervisor, during device discovery, has code which can examine the south-side management data structure in an adapter's configuration space and determine the type of device which is being configured. The hypervisor may copy the south-side management data structure to a hardware management console ...


4
Michael K Gschwind: Compiling scalar code for a single instruction multiple data (SIMD) execution engine. International Business Machines Corporation, Frances Lammes, Stephen J Walder Jr, Matthew B Talpis, January 31, 2012: US08108846 (35 worldwide citation)

A mechanism is provided for performing scalar operations using a SIMD data parallel execution unit. With the mechanisms of the illustrative embodiments, scalar operations in application code are identified that may be executed using vector operations in a SIMD data parallel execution unit. The scala ...


5
Maximino Aguilar Jr, Mark Richard Nutter, James Michael Stafford: Processor dedicated code handling in a multi-processor environment. International Business Machines Corporation, VanLeeuwen & VanLeeuwen, Matthew B Talpis, June 16, 2009: US07549145 (34 worldwide citation)

Code handling, such as interpreting language instructions or performing “just-in-time” compilation, uses a heterogeneous processing environment that shares a common memory. In a heterogeneous processing environment that includes a plurality of processors, one of the processors is programmed to perfo ...


6
Jos Manuel Accapadi, Mathew Accapadi, William Lee Britton, Andrew Dunshea, Dirk Michel: User defined preferred DNS reference. International Business Machines Corporation, Matthew B Talpis, James L Baudino, October 11, 2011: US08037203 (32 worldwide citation)

Methods, systems, and products are disclosed for user defined preferred DNS routing that include mapping for a user in a data communications application a domain name of a network host to a network address for a preferred DNS server, wherein the preferred DNS server has a network address for the dom ...


7
Alexandre E Eichenberger, John Kevin Patrick O Brien, Kathryn M O Brien: Method to efficiently prefetch and batch compiler-assisted software cache accesses. International Business Machines Corporation, Stephen J Walder Jr, Matthew B Talpis, February 17, 2009: US07493452 (31 worldwide citation)

A method to efficiently pre-fetch and batch compiler-assisted software cache accesses is provided. The method reduces the overhead associated with software cache directory accesses. With the method, the local memory address of the cache line that stores the pre-fetched data is itself cached, such as ...


8
Maximino Aguilar Jr, Michael Norman Day, Mark Richard Nutter, James Michael Stafford: Asymmetric heterogeneous multi-threaded operating system. International Business Machines Corporation, VanLeeuwen & VanLeeuwen, Matthew B Talpis, April 7, 2009: US07516456 (29 worldwide citation)

A method for an asymmetric heterogeneous multi-threaded operating system is presented. A processing unit (PU) provides a trusted mode environment in which an operating system executes. A heterogeneous processor environment includes a synergistic processing unit (SPU) that does not provide trusted mo ...


9
Maximino Aguilar Jr, Charles Ray Johns, Mark Richard Nutter, James Michael Stafford: Selection of processor cores for optimal thermal performance. International Business Machines Corporation, Yee & Associates P C, Matthew B Talpis, September 29, 2009: US07596430 (29 worldwide citation)

A computer implemented method, data processing system, computer usable code, and apparatus are provided for optimizing the thermal performance of a computer system. A set of processor cores associated with the computer system are identified. A thermal index is requested for each of the set of proces ...


10
Alexandre E Eichenberger, John K P O Brien, Kathryn M O Brien, Nicolas T Vasilache: Selective code generation optimization for an advanced dual-representation polyhedral loop transformation framework. International Business Machines Corporation, Stephen J Walder Jr, Matthew B Talpis, December 27, 2011: US08087010 (24 worldwide citation)

Mechanisms for selective code generation optimization for an advanced dual-representation polyhedral loop transformation framework are provided. The mechanisms of the illustrative embodiments address the weaknesses of the known polyhedral loop transformation based approaches by providing mechanisms ...



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