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Rino Micheloni, Peter Z Onufryk, Alessia Marelli, Christopher I W Norrie, Ihab Jaser: Apparatus and method for adjusting a correctable raw bit error rate limit in a memory system using strong log-likelihood (LLR) values. PMC SIERRA US, Glass & Associates, Kenneth Glass, Mark Peloquin, September 8, 2015: US09128858 (5 worldwide citation)

Apparatuses and methods for correcting errors in data read from memory cells of an integrated circuit device includes an encoder. The encoder is configured from a single parity check matrix and the encoder is configured to be virtually adjustable by setting a number of bits in the encoder to zero. A ...


2
Rino Micheloni, Peter Z Onufryk, Alessia Marelli, Christopher I W Norrie: System and method for lifetime specific LDPC decoding. Microsemi Storage Solutions, Kenneth Glass, Mark Peloquin, Glass & Associates, July 19, 2016: US09397701 (4 worldwide citation)

A nonvolatile memory storage controller is provided for delivering log likelihood ratios (LLRs) to a low-density parity check (LDPC) decoder for use in the decoding of an LDPC encoded codeword. The controller includes read circuitry for reading an LDPC encoded codeword stored in a nonvolatile memory ...


3
Rino Micheloni, Peter Z Onufryk, Alessia Marelli, Christopher I W Norrie, Ihab Jaser: Apparatus and method based on LDPC codes for adjusting a correctable raw bit error rate limit in a memory system. PMC SIERRA US, Kenneth Glass, Mark Peloquin, Glass & Associates, July 28, 2015: US09092353 (2 worldwide citation)

Systems and methods for correcting errors in data read from memory cells include a memory controller, which includes an encoder, and a decoder. The memory controller is configured to adjust a correctable raw bit error rate limit to correct different bit error rates occurring in data read from the me ...


4
I chang Wu, Jagdeep Bal: Methods and systems for analog-to-digital conversion (ADC) using an ultra small capacitor array with full range and sub-range modes. Integrated Device Technology, Kenneth Glass, Mark Peloquin, Glass & Associates, January 24, 2017: US09553602 (1 worldwide citation)

Methods and apparatuses are described to convert analog signals to digital signals using a local charge averaging capacitor array (LCACA) in an analog-to-digital converter (ADC.) An apparatus includes a comparator. The comparator is configured with a first high input, a first low input, and is confi ...


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Rino Micheloni, Alessia Marelli, Peter Z Onufryk, Christopher I W Norrie: Layer specific LDPC decoder. MICROSEMI SOLUTIONS, Glass & Associates, Kenneth Glass, Mark Peloquin, November 7, 2017: US09813080

A method to decode low-density parity check (LDPC) encoded data using a parity check matrix having a plurality of layers, includes receiving a plurality of values at a decoder. Each value of the plurality of values represents one of a plurality of bits of an LDPC codeword encoded using the parity ch ...


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Rino Micheloni, Alessia Marelli, Peter Z Onufryk, Christopher I W Norrie, Ihab Jaser: Memory controller and integrated circuit device for correcting errors in data read from memory cells. Microsemi Storage Solutions, Glass & Associates, Kenneth Glass, Mark Peloquin, September 20, 2016: US09448881

An integrated circuit device for correcting errors in data read from memory cells includes a decoder, an encoder and a data management module. The data management module is configured to select a correctable raw bit error rate limit from a plurality of raw bit error rate limits by changing a code-ra ...


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Jagdeep Bal: Crystal-less jitter attenuator. Integrated Device Technology, Glass & Associates, Kenneth Glass, Mark Peloquin, January 24, 2017: US09553570

An integrated circuit to remove jitter from a clock signal includes an integrated circuit die. The integrated circuit die includes a signal comparator. The signal comparator is configured to determine a frequency difference between a jittery input clock signal and a correction signal. A digital low ...


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Mohammad Shahanshah Akhter, Bachir Berkane: Methods and apparatuses for a unified compression framework of baseband signals. INTEGRATED DEVICE TECHNOLOGY, Kenneth Glass, Mark Peloquin Glass & Associates, April 12, 2016: US09313300

A method and apparatus provides a parameter estimation processor configured to estimate parameters used to compress data for transmission over a serial data link. The parameter estimation processor includes a processor. The processor includes user programmable inputs. The user programmable inputs se ...


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Min Chu, Jagdeep Bal: Fractional reference-injection PLL. INTEGRATED DEVICE TECHNOLOGY, Glass & Associates, Mark Peloquin, Kenneth Glass, June 14, 2016: US09369139

Methods and apparatuses are described to reduce phase noise in a low noise fractional reference-injection phase locked loop (FRIPLL). The FRIPLL includes a ring voltage controlled oscillator (VCO). An output of the ring VCO is input to a fractional interpolative frequency divider (FIFD). A signal co ...


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John Hsu: Low power driver with programmable output impedance. INTEGRATED DEVICE TECHNOLOGY, Glass & Associates, Kenneth Glass, Mark Peloquin, November 8, 2016: US09490805

A programmable low power driver permits an output impedance of the driver to be programmed. Programmability permits the driver output impedance to match an impedance of a transmission line that is connected thereto. The low power driver includes a first driver output and a plurality of driver legs. ...