1
Frank J Gorishek IV, Charles R Boswell Jr, David W Smith: Symmetrical multiprocessing bus and chipset used for coprocessor support allowing non-native code to run in a system. Advanced Micro Devices, Lawrence J Merkel, Conley Rose & Tayon PC, October 23, 2001: US06308255 (341 worldwide citation)

A computer system includes a host processor and an emulation coprocessor. The host processor includes hardware configured to execute instructions defined by a host instruction set architecture, while the emulation coprocessor includes hardware configured to execute instructions defined by a differen ...


2
Hans F van Rietschote, Craig W Hobbs, Mahesh P Saptarshi: Migrating virtual machines among computer systems to balance load caused by virtual machines. VERITAS Operating Corporation, Lawrence J Merkel, Meyertons Hood Kivlin Kowert & Goetzel P c, April 10, 2007: US07203944 (229 worldwide citation)

A cluster comprises a plurality of computer systems, wherein each of the plurality of computer systems is configured to execute one or more virtual machines. Each of the plurality of computer systems comprises hardware and a plurality of instructions. The plurality of instructions, when executed on ...


3
Hans F van Rietschote: Disaster recovery and backup using virtual machines. VERITAS Operating Corporation, Lawrence J Merkel, Meyertons Hood Kivlin Kowert & Goetzel P C, August 15, 2006: US07093086 (200 worldwide citation)

One or more computer systems, a carrier medium, and a method are provided for backing up virtual machines. The backup may occur, e.g., to a backup medium or to a disaster recovery site, in various embodiments. In one embodiment, an apparatus includes a computer system configured to execute at least ...


4
Stephan G Meier, Norbert Juffa, Michael D Achenbach, Frederick D Weber: Converting register data from a first format type to a second format type if a second type instruction consumes data produced by a first type instruction. Advanced Micro Devices, Lawrence J Merkel, Conley Rose & Tayon P C, August 15, 2000: US06105129 (176 worldwide citation)

A microprocessor includes one or more registers which are architecturally defined to be used for at least two data formats. In one embodiment, the registers are the floating point registers defined in the x86 architecture, and the data formats are the floating point data format and the multimedia da ...


5
David B Witt, Rajiv M Hattangadi: Data cache which speculatively updates a predicted data cache storage location with store data and subsequently corrects mispredicted updates. Advanced Micro Devices, B Noel Kivlin, Lawrence J Merkel, Conley Rose & Tayon PC, January 12, 1999: US05860104 (168 worldwide citation)

A data cache configured to perform store accesses in a single clock cycle is provided. The data cache speculatively stores data within a predicted way of the cache after capturing the data currently being stored in that predicted way. During a subsequent clock cycle, the cache hit information for th ...


6
David S Christie: Chipset configured to perform data-directed prefetching. Advanced Micro Devices, Lawrence J Merkel, Conley Rose & Tayon PC, June 12, 2001: US06247107 (150 worldwide citation)

A chipset is configured to communicate between one or more processors and other components of the computer system, including a main memory. The chipset communicates read memory operations initiated by the processors to the main memory, and returns the data provided therefrom to the processors. Addit ...


7
Hans F van Rietschote, Sachinrao C Panemangalore, Mahesh Joshi, Sharad Srivastava: Failing over a virtual machine. Veritas Operating Corporation, Lawrence J Merkel, Meyertons Hood Kivlin Kowert & Goetzel P c, May 1, 2007: US07213246 (142 worldwide citation)

A first computer system may be configured to execute a first application in a first virtual machine. A second computer system may be coupled to the first computer system. In response to a failure, the first computer system is configured to failover the first virtual machine to the second computer sy ...


8
David S Christie: Microprocessor with built-in instruction tracing capability. Advanced Micro Devices, Lawrence J Merkel, B Noel Kivlin, Conley Rose & Tayon, August 31, 1999: US05944841 (139 worldwide citation)

A computer system employing an instruction tracing mechanism includes a memory and a CPU. The memory includes a trace buffer used to store records of the instruction tracing. Entries in the trace buffer are pointed to by a tracer pointer. The memory is coupled to the CPU via a bus interface unit. In ...


9
James Y Cho, James B Keller, Mark D Hayter: Memory controller with programmable configuration. Broadcom Corporation, Lawrence J Merkel, Meyertons Hood Kivlin Kowert & Goetzel P C, September 23, 2003: US06625685 (115 worldwide citation)

A memory controller provides programmable flexibility, via one or more configuration registers, for the configuration of the memory. The memory may be optimized for a given application by programming the configuration registers. For example, in one embodiment, the portion of the address of a memory ...


10
Mark D Hayter, Joseph B Rowlands, James Y Cho: System on a chip for networking. Broadcom Corporation, Lawrence J Merkel, July 20, 2004: US06766389 (113 worldwide citation)

A system on a chip for network devices. In one implementation, the system on a chip may include (integrated onto a single integrated circuit), a processor and one or more I/O devices for networking applications. For example, the I/O devices may include one or more network interface circuits for coup ...