1
Private
Kevin J Ash, Michael T Benhase, Lokesh M Gupta, Matthew J Kalos, Keneth W Todd: Managing unmodified tracks maintained in both a first cache and a second cache. International Business Machines Corporation, David W Victor, Konrad Raynes Davda & Victor, April 15, 2014: US08700854 (6 worldwide citation)

Provided are a computer program product, system, and method for managing unmodified tracks maintained in both a first cache and a second cache. The first cache has unmodified tracks in the storage subject to Input/Output (I/O) requests. Unmodified tracks are demoted from the first cache to a second ...


2
Private
Michael T Benhase, Lokesh M Gupta, Matthew J Kalos: Populating strides of tracks to demote from a first cache to a second cache. International Business Machines Corporation, David W Victor, Konrad Raynes Davda & Victor, September 30, 2014: US08850106

Provided are a computer program product, system, and method for populating strides of tracks to demote from a first cache to a second cache. A first cache maintains modified and unmodified tracks from a storage system subject to Input/Output (I/O) requests. A determination is made to demote tracks f ...


3
Private
Michael T Benhase, Binny S Gill, Lokesh M Gupta, Matthew J Kalos: Cache management of tracks in a first cache and a second cache for a storage. International Business Machines Corporation, Konrad Raynes Davda & Victor, David W Victor, July 29, 2014: US08793436

Provided a computer program product, system, and method for cache management of tracks in a first cache and a second cache for a storage. The first cache maintains modified and unmodified tracks in the storage subject to Input/Output (I/O) requests. Modified and unmodified tracks are demoted from th ...


4
Private
Michael T Benhase, Binny S Gill, Lokesh M Gupta, Matthew J Kalos: Cache management of tracks in a first cache and a second cache for a storage. International Business Machines Corporation, Konrad Raynes Davda & Victor, David W Victor, June 3, 2014: US08745332

Provided a computer program product, system, and method for cache management of tracks in a first cache and a second cache for a storage. The first cache maintains modified and unmodified tracks in the storage subject to Input/Output (I/O) requests. Modified and unmodified tracks are demoted from th ...


5
Private
Michael T Benhase, Binny S Gill, Lokesh M Gupta, Matthew J Kalos: Using an attribute of a write request to determine where to cache data in a storage system having multiple caches including non-volatile storage cache in a sequential access storage device. International Business Machines Corporation, Konrad Raynes Davda & Victor, David W Victor, June 3, 2014: US08745325

Provided are a computer program product, system, and method for using an attribute of a write request to determine where to cache data in a storage system having multiple caches including non-volatile storage cache in a sequential access storage device. Received modified tracks are cached in the non ...


6
David Frederick Champion, Timothy Andreas Meserth, Mark E Molander, Patrick Gabor Nyeste, David Thomas Windell, Jeffrey John Smith: Method, apparatus and program storage device for providing customizable, immediate and radiating menus for accessing applications and actions. International Business Machines Corporation, William Konrad, Konrad Raynes Davda & Victor, January 8, 2013: US08352881 (80 worldwide citation)

A method, apparatus and program storage device for providing customizable, immediate and radiating menus for accessing applications and actions. Upon initiation of a predetermined user action, such as a right-click operation, a primary menu is displayed and a second radial menu is displayed proximat ...


7
Robert E Frickey III, Jonathan M Hughes: Method and system to improve the performance of a multi-level cell (MLC) NAND flash memory. Intel Corporation, Konrad Raynes Davda & Victor, David W Victor, December 11, 2012: US08332578 (29 worldwide citation)

A method and system to improve the performance of a multi-level cell (MLC) NAND flash memory. In one embodiment of the invention, the metadata associated with the data stored in a MLC NAND flash memory is stored only in one or more lower pages of the MLC NAND flash memory. The MLC NAND flash memory ...


8
James Lee Hafner, David Ray Kahler, Robert Akira Kubo, David Frank Mannenbach, Karl Allen Nielsen, James A O Connor, Krishnakumar Rao Surugucchi, Richard B Stelmach: Error checking addressable blocks in storage. International Business Machines Corporation, David W Victor, Konrad Raynes Davda & Victor, February 5, 2013: US08370715 (28 worldwide citation)

Provided are a method, system, and article of manufacture for error checking addressable blocks in storage. Addressable blocks of data are stored in a storage in stripes, wherein each stripe includes a plurality of data blocks for one of the addressable blocks and at least one checksum block includi ...


9
Alexander Gorelik, Lingling Yan: Semantic discovery and mapping between data sources. International Business Machines Corporation, David W Victor, Konrad Raynes Davda & Victor, May 14, 2013: US08442999 (23 worldwide citation)

An apparatus and method are described for the discovery of semantics, relationships and mappings between data in different software applications, databases, files, reports, messages, or systems. In one aspect, semantics and relationships and mappings are identified between a first and a second data ...


10
Hisham E Elshishiny, Ahmed T Sayed Gamal El Din: Scheduling threads in a processor based on instruction type power consumption. International Business Machines Corporations, Janaki K Davda, Konrad Raynes Davda & Victor, February 18, 2014: US08656408 (18 worldwide citation)

Guiding OS thread scheduling in multi-core and/or multi-threaded microprocessors by: determining, for each thread among the active threads, the power consumed by each instruction type associated with an instruction executed by the thread during the last context switch interval; determining for each ...