1
Donald L Tietjen: Wait mode power reduction system and method for data processor. Motorola, John A Fisher, Jeffrey Van Myers, Jonathan P Meyer, October 25, 1988: US04780843 (155 worldwide citation)

A method and apparatus for reducing power consumption in a data processing system by interrupting the supply of clocking pulses to selected portions of the system in response to a power-down signal provided by a data processing portion of the system only if the state of a respective control signal i ...


2
Mark R Heene, Michael H Menkedick, James M Sibigtroth, George L Espinor: Single chip microcomputer with patching and configuration controlled by on-board non-volatile memory. Motorola, Delco Electronics Corporation, Jonathan P Meyer, January 31, 1989: US04802119 (134 worldwide citation)

A single chip microcomputer with patching and configuration is provided with blocks of patch memory which may be patched over faulty and/or obsolete areas of the microcomputer's memory map under control of starting address registers which are implemented in on-board non-volatile memory. The starting ...


3
Earl R Murphy: Microstrip to waveguide transition. Motorola, Jonathan P Meyer, Eugene A Parsons, June 5, 1984: US04453142 (115 worldwide citation)

A microstrip to waveguide transition is achieved by passing a portion of a microstrip circuit through an aperture in a transverse wall of a waveguide. The aperture is dimensioned and positioned so as not to significantly disturb propagation in the waveguide. A tab of the microstrip substrate extends ...


4
Bradley G Burgess: Intelligent electrically erasable, programmable read-only memory with improved read latency. Motorola, Jonathan P Meyer, July 23, 1991: US05034922 (77 worldwide citation)

An intelligent electrically erasable, programmable read-only memory achieves improved worst-case read operation latency by allowing for the interruption of write operations by subsequently received read requests. In the preferred embodiment, a state machine controller executes write operations by an ...


5
John J Vaglica, Jay A Hartvigsen, Rand L Gray: Data processor with development support features. Motorola, Jonathan P Meyer, January 28, 1992: US05084814 (70 worldwide citation)

A data processor with development support features includes an alternate mode of operation in which instructions are received by means of an externally-controlled path. The connections used by the externally-controlled path are not shared by any system resources accessible to the data processor in t ...


6
Jules D Campbell Jr, William D Huston, William P Laviolette: Automatic selection of external multiplexer channels by an A/D converter integrated circuit. Motorola, Robert L King, Jonathan P Meyer, Walter W Nielsen, November 24, 1992: US05166685 (68 worldwide citation)

An analog-to-digital conversion system module comprises a pin-limited A/D converter integrated circuit (I.C.) to which at least one multiplexer I.C. may be coupled and sampled.


7
Susan C Hill, Joseph Jelemensky, Mark R Heene, Stanley E Groves, Daniel N DeBrito: Queued serial peripheral interface for use in a data processing system. Motorola, Jonathan P Meyer, September 18, 1990: US04958277 (64 worldwide citation)

A serial peripheral interface achieves compatibility with devices having previous such interfaces while singificantly reducing the amount of intervention required on the part of the controlling data processing device. Many serial transfers are written to a memory by the controlling device together w ...


8
Susan C Hill, Joseph Jelemensky, Mark R Heene: Queued serial peripheral interface for use in a data processing system. Motorola, Jonathan P Meyer, March 28, 1989: US04816996 (64 worldwide citation)

A serial peripheral interface achieves compatibility with devices having previous such interfaces while significantly reducing the amount of intervention required on the part of the controlling data processing device. Many serial transfers are written to a memory by the controlling device together w ...


9
John A Langan, James M Sibigtroth: Microcomputer with on-board chip selects and programmable bus stretching. Motorola, Jonathan P Meyer, September 29, 1992: US05151986 (63 worldwide citation)

A microcomputer with an external bus interface for providing communication with external peripheral devices such as memory and the like is provided with on-board chip select logic and programmable bus stretching capability. The chip select logic provides chip select signals to external devices when ...


10
Joseph T Marino Jr, Ronald V Chandos: Processor for simulating digital structures. Motorola, Jonathan P Meyer, May 6, 1986: US04587625 (63 worldwide citation)

A hardware simulator for simulating digital structures includes a general purpose computer and an improved simulator processor. The improved processor handles an advanced primitive having four inputs and one output and which is capable of representing a memory cell or similar structure. The architec ...