1
Xavier Baie
Bruce B Doris, Dureseti Chidambarrao, Xavier Baie, Jack A Mandelman, Devendra K Sadana, Dominic J Schepis: SOI based field effect transistor having a compressive film in undercut area under the channel and a method of making the device. International Business Machines Corporation, Jay H Anderson, Whitham Curtis & Christofferson P C, April 6, 2004: US06717216 (146 worldwide citation)

Field effect transistor with increased charge carrier mobility due to stress in the current channel 22. The stress is in the direction of current flow (longitudinal). In PFET devices, the stress is compressive; in NFET devices, the stress is tensile. The stress is created by a compressive film 34 in ...


2
Xavier Baie
Dureseti Chidambarrao, Omer H Dokumaci, Bruce B Doris, Jack A Mandelman, Xavier Baie: Stress inducing spacers. International Business Machines Corporation, Jay H Anderson, Eugene I Shkurko, November 30, 2004: US06825529 (141 worldwide citation)

A substrate under tension and/or compression improves performance of devices fabricated therein. Tension and/or compression can be imposed on a substrate through selection of appropriate gate sidewall spacer material disposed above a device channel region wherein the spacers are formed adjacent both ...


3
Xavier Baie
Bruce B Doris, Dureseti Chidambarrao, Xavier Baie, Jack A Mandelman, Devendra K Sadana, Dominic J Schepis: Field effect transistor with stressed channel and method for making same. International Business Machines Corporation, Whitham Curtis & Christofferson P C, Jay H Anderson, April 26, 2005: US06884667 (18 worldwide citation)

Field effect transistor with increased charge carrier mobility due to stress in the current channel 22. The stress is in the direction of current flow (longitudinal). In PFET device, the stress is compressive; in NFET devices, the stress is tensile. The stress is created by a compressive film 34 in ...


4
H Bernhard Pogge, Roy Yu, Chandrika Prasad, Chandrasekhar Narayan: Chip and wafer integration process using vertical connections. International Business Machines Corporation, Jay H Anderson, July 29, 2003: US06599778 (307 worldwide citation)

A process is described for semiconductor device integration at chip level or wafer level, in which vertical connections are formed through a substrate. A metallized feature is formed in the top surface of a substrate, and a handling plate is attached to the substrate. The substrate is then thinned a ...


5
Edward E Kelley, Franco Motika, Paul V Motika, Eric M Motika: Secure credit card. International Business Machines Corporation, Jay H Anderson, Whitham Curtis & Christofferson P C, November 4, 2003: US06641050 (198 worldwide citation)

Credit card or portable identification cards containing smart card technology and electronic fuse (e-fuse) technology are combined with an LFSR pseudo random number generator to provide a secured method to prevent fraud and unauthorized use. Secure personalization via e-fuses, a pseudo-random number ...


6
Daniel C Edelstein, Timothy J Dalton, John G Gaudiello, Mahadevaiyer Krishnan, Sandra G Malhotra, Maurice McGlashan Powell, Eugene J O Sullivan, Carlos J Sambucetti: Dual etch stop/diffusion barrier for damascene interconnects. International Business Machines Corporation, Jay H Anderson, Ratner & Prestia, November 28, 2000: US06153935 (159 worldwide citation)

A damascene interconnect containing a dual etch stop/diffusion barrier. The conductive material of the damascene interconnect is capped with a conductive metal diffusion barrier cap, typically using electroless deposition, and, optionally, with a dielectric etch-stop layer. An optional chemical mech ...


7
Wesley Natzle, Richard A Conti, Laertis Economikos, Thomas Ivers, George D Papasouliotis: Directional CVD process with optimized etchback. International Business Machines Corporation, Jay H Anderson, January 1, 2002: US06335261 (142 worldwide citation)

A method is described for filling a high-aspect-ratio feature, in which compatible deposition and etching steps are performed in a sequence. The feature is formed as an opening in a substrate having a surface; a fill material is deposited at the bottom of the feature and on the surface of the substr ...


8
Matthew Broomhall, Lauri Jackson Landau: Client account generation and authentication system for a network server. International Business Machines Corporation, Jay H Anderson, September 18, 2001: US06292904 (134 worldwide citation)

A system and method are described for providing secure user account identifiers and passwords to facilitate sharing by users of data between a secure internal server and an external server accessible over the Internet. A user account identifier is generated in accordance with a request from a user h ...


9
Huajie Chen, Dan M Mocuta, Richard J Murphy, Stephan W Bedell, Devendra K Sadana: Method of preventing surface roughening during hydrogen prebake of SiGe substrates. International Business Machines Corporation, McGinn & Gibb PLLC, Jay H Anderson Esq, October 25, 2005: US06958286 (107 worldwide citation)

The invention forms an epitaxial silicon-containing layer on a silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface and avoids creating a rough surface upon which the epitaxial silicon-containing layer is grown. In order to avoid creating the rough surface, t ...


10
Dureseti Chidambarrao, Omer H Dokumaci, Bruce B Doris, Jack A Mandelman: Isolation structures for imposing stress patterns. International Business Machines Corporation, Jay H Anderson, Eugene Shkurko, December 13, 2005: US06974981 (95 worldwide citation)

A substrate under tension and/or compression improves performance of devices fabricated therein. Tension and/or compression can be imposed on a substrate through selection of appropriate STI fill material. The STI regions are formed in the substrate layer and impose forces on adjacent substrate area ...



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