1
John C Hunter, John A Wertz: Multi-node cluster computer system incorporating an external coherency unit at each node to insure integrity of information stored in a shared, distributed memory. Bull HN Information Systems, J S Solakian, J H Phillips, February 28, 1995: US05394555 (221 worldwide citation)

A computer cluster architecture including a plurality of CPUs at each of a plurality of nodes. Each CPU has the property of coherency and includes a primary cache. A local bus at each node couples: all the local caches, a local main memory having physical space assignable as-shared space and non-sha ...


2
Brian C Horn: Discontinuous optimization procedure modelling the run-idle status of plural process components. Honeywell, A A Sapelli, J S Solakian, A Medved, August 19, 1986: US04607325 (77 worldwide citation)

A method of optimizing the operation of a process so that desired products are produced at minimum cost. The process has a plurality of process components, with each component having a run status and an idle status. The process has available more than one input and produces more than one output. The ...


3
Forouzan Golshani, Oris D Friesen, Thomas H Howell: Method of integrating schemas of distributed heterogeneous databases. Bull HN Information Systems, J S Solakian, E W Hughes, September 8, 1998: US05806066 (74 worldwide citation)

A method for integrating the schemas of a plurality of independent and heterogeneous database management systems of a distributed database management system (DDBMS). The DDBMS includes a computer system in which the DDBMS resides and one or more subservient computer systems. The schemas of two of th ...


4
James E Gray: Method and data processing system for detecting patterns in SQL to allow optimized use of multi-column indexes. Bull HN Information Systems, J S Solakian, J H Phillips, March 5, 2002: US06353821 (73 worldwide citation)

A database management optimizer detects patterns in SQL that occur when search conditions are present that represent ranges of values across multiple columns of a table. These patterns are recognized and translated into simpler key value ranges that can be used to provide more efficient use of datab ...


5
Kelly W Still: Method for gradual deployment of user-access security within a data processing system. Bull HN Information Systems, J S Solakian, J H Phillips, November 23, 1999: US05991879 (68 worldwide citation)

A method allowing the gradual deployment of a new security policy on a data processing system wherein users may access certain objects under the former authorization until complete security implementation is achieved. A user having a security profile satisfying the former security policy criteria, b ...


6
Claudio Fiacconi, Antonio Franzosi: Multiprocessor system with interrupt notification and verification unit. Honeywell Bull Italia S p A, A A Sapelli, J S Solakian, August 29, 1989: US04862354 (61 worldwide citation)

A multiprocessor system architecture in which two processors are each provided with an autonomous bus and the two buses can be selectively connected to each other to form a unique system bus which enables access by all processors to common memory resources connected to one of the autonomous buses. T ...


7
Norman L Culp: Digital phase locked loop. Honeywell, A A Sapelli, J S Solakian, A Medved, March 18, 1986: US04577163 (61 worldwide citation)

A digital phase locked loop is provided by the present invention which includes a digital controlled oscillator (DCO), whereby the frequency of the output signal of the DCO is a function of the value associated with a digital input word. The frequency of the output signal of the DCO is phase compare ...


8
Clinton B Eckard: Conditional truncation indicator control for a decimal numeric processor employing result truncation. Bull HN Information Systems, J H Phillips, J S Solakian, November 30, 1999: US05995992 (59 worldwide citation)

In a coprocessor which processes operands and issues a result word which may include overflow, result and truncation fields and which normally sets a truncation indicator if truncation is employed, the setting of the truncation indicator is inhibited under certain conditions to facilitate later hand ...


9
Russell W Guenthner, William A Shelly, Gary R Presley Nelson, Kala J Marietta, R Morse Wade: Method and apparatus for prefetching instructions for a central execution pipeline unit. Honeywell Information Systems, A A Sapelli, J S Solakian, A Medved, June 10, 1986: US04594659 (59 worldwide citation)

Method and apparatus for prefetching instructions for a pipelined central processor unit for a general purpose digital data processing system. A table is maintained for purposes of predicting the target addresses of transfer and indirect instructions based on past history of the execution of those i ...


10
Carlo Bagnoli, Angelo Casamatta, Angelo Lazzari: Multiprocessor system having global data replication. Bull HN Information Systems Italia S p A, J H Phillips, J S Solakian, May 25, 1993: US05214776 (56 worldwide citation)

A multiprocessor system having global data replicated in all local memories, each local memory related to one of the system central processing units (CPUs), where consistency of the global data in each of the local memories is provided by a global write procedure according to which an agent CPUZ, wi ...