1
Katherina Babich
Marie Angelopoulos, Katherina E Babich, Cameron James Brooks, S Jay Chey, C Richard Guarnieri, Michael Straight Hibbs, Kenneth Christopher Racette: Attenuated embedded phase shift photomask blanks. Ibm Corporation, Intellectual Property Law Dept, August 29, 2002: US20020119378-A1

An attenuating embedded phase shift photomask blank that produces a phase shift of the transmitted light is formed with an optically translucent film made of metal, silicon, nitrogen or metal, silicon, nitrogen and oxygen. A wide range of optical transmission (0.001% up to 20% at 193 nm) is obtained ...


2
Katherina Babich
Marie Angelopoulos, Katherina Babich, S Jay Chey, Michael Straight Hibbs, Robert N Lang, Arpan Pravin Mahorowala, Kenneth Christopher Racette: Attenuated embedded phase shift photomask blanks. International Business Machines Corporation, Ibm Corporation, Intellectual Property Law Dept, October 16, 2003: US20030194568-A1

An attenuating embedded phase shift photomask blank that produces a phase shift of the transmitted light is formed with an optically translucent film made of metal, silicon, nitrogen and oxygen. An etch stop layer is added to improve the etch selectivity of the phase shifting layer. A wide range of ...


3
Jack Oon Chu, Alfred Grill, Dean A Herman, Katherine L Saenger: Transferable device-containing layer for silicon-on-insulator applications. International Business Machines Corporation, Robert M Trepp, Intellectual Property Law Dept, July 25, 2002: US20020096717-A1 (3 worldwide citation)

A method for forming an integrated circuit on an insulating substrate is described comprising the steps of forming a semiconductor layer on a seed wafer substrate containing an at least partially crystalline porous release layer, processing the semiconductor layer to form a “transferable” device lay ...


4
Jochen AG Jess, Chandramouli Visweswariah: System and method for statistical modeling and statistical timing analysis of integrated circuits. Louis J Percello, Intellectual Property Law Dept, January 1, 2004: US20040002844-A1 (2 worldwide citation)

A comprehensive methodology for statistical modeling and timing of integrated circuits and integrated circuit macros is disclosed with a means for efficiently computing the sensitivities of coefficients of gate delay models to sources of variation. These sensitivities are used to determine the proba ...


5
Silke H Christiansen, Jack O Chu, Alfred Grill, Patricia M Mooney: Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing. International Business Machines Corporation, Ibm Corporation, Intellectual Property Law Dept, November 27, 2003: US20030218189-A1 (2 worldwide citation)

A method to obtain thin (less than 300 nm) strain-relaxed Si1xGex buffer layers on Si or silicon-on-insulator (SOI) substrates. These buffer layers have a homogeneous distribution of misfit dislocations that relieve the strain, remarkably smooth surfaces, and a low threading dislocation (TD) density ...


6
Chekib Akrout, Harm Peter Hofstee, James Allan Kahle: Processor with redundant logic. International Business Machines Corporation, Casimer K Salys, Intellectual Property Law Dept, June 19, 2003: US20030115500-A1 (2 worldwide citation)

A system including a central processor and a plurality of attached processors all on a single die are disclosed Each of the attached processors is preferably functionally equivalent to each of the other attached processors. The system further includes at least one redundant processor that is connect ...


7
Jack Oon Chu, Basanth Jagannathan, Alfred Grill, Bernard Steele Meyerson, John Albrecht Ott: Epitaxial and polycrystalline growth of Si1-x-yGexCy and Si1-yCy alloy layers on Si by UHV-CVD. International Business Machines Corporation, Ibm Corporation, Intellectual Property Law Dept, December 5, 2002: US20020182423-A1 (2 worldwide citation)

A method and apparatus for depositing single crystal, epitaxial films of silicon carbon and silicon germanium carbon on a plurality of substrates in a hot wall, isothermal UHV-CVD system is described. In particular, a multiple wafer low temperature growth technique in the range from 350° C. to 750° ...


8
Taiga Nakamura, Ryuki Tachibana, Shuichi Shimizu, Seiji Kobayashi: Embedding, processing and detection of digital content, information and data. International Business Machines Corporation, Ibm Corporation, Intellectual Property Law Dept, July 18, 2002: US20020095577-A1 (2 worldwide citation)

Enables identification and detection of processing and type of digital content, while using multiple electronic watermarks. One embodiment provides a data processing detection system having an embedding apparatus for adding a predetermined additional signal to digital content, including a watermark ...


9
Ronald Roy Troutman: Field sequential gray in active matrix led display using complementary transistor pixel circuits. Daniel P Morris IBM Corporation, Intellectual Property Law Dept, November 22, 2001: US20010043173-A1 (1 worldwide citation)

Disclosed is a pixel circuit consisting of complementary N- and P-channel MOS field-effect transistors (or of thin-film transistors), a capacitor, and an organic light-emitting diode. This circuit stores a voltage signal that is used to control the amount of light emitted from the pixel by means of ...


10
Ryuki Tachibana, Shuhichi Shimizu, Seiji Kobayashi: Electronic watermarking method and apparatus for compressed audio data, and system therefor. Louis P Herzberg, Intellectual Property Law Dept, January 17, 2002: US20020006203-A1 (1 worldwide citation)

The present invention provides a method and a system with which information embedded in compressed digital audio data can be directly operated. An embodiment of the system for embedding additional information in compressed audio data includes: means for extracting MDCT (Modified Discrete Cosine Tran ...