1
Claude Louis Bertin, Thomas George Ference, Wayne John Howell, Edmund Juris Sprogis: Highly integrated chip-on-chip packaging. International Business Machines Corporation, Howard J Walter Jr, Schmeiser Olsen & Watts, November 2, 1999: US05977640 (264 worldwide citation)

The advantages of the invention are realized by a chip-on-chip module having at least two fully functional chips, electrically connected together, and a chip-on-chip component connection/interconnection for electrically connecting the fully functional chips to external circuitry.


2
Steven Howard Voldman: 3-D CMOS-on-SOI ESD structure and method. International Business Machines Corporation, Howard J Walter Jr, July 13, 1999: US05923067 (135 worldwide citation)

Three-dimensional ESD structures are constructed in SOI technology that utilize both bulk devices and thin film SOI devices.


3
Paul A Farrar, Robert M Geffken, Charles T Kroll: Method for forming dense multilevel interconnection metallurgy for semiconductor devices. International Business Machines Corporation, Howard J Walter Jr, January 3, 1984: US04423547 (123 worldwide citation)

A method for providing high density multiple level metallurgy for integrated circuit devices in which a relatively thin layer of plasma produced silicon nitride is deposited over a first level of interconnection metallurgy formed on a layer of silicon oxide. Overlap via holes are etched in the nitri ...


4
Wilber D Pricer, Thomas B Faure, Bernard S Meyerson, William J Nestork, John R Turnbull Jr: Three-dimensional semiconductor structures formed from planar layers. International Business Machines Corporation, Howard J Walter Jr, November 3, 1992: US05160987 (117 worldwide citation)

Three-dimensional semiconductor structures are taught in which various device types are formed from a plurality of planar layers on a substrate. The major process steps include the formation of a plurality of alternating layers of material, including semiconductor and dielectric materials, forming a ...


5
Steven H Lamphier, Harold Pilo, Michael J Schneiderwind, Fred J Towler: Programmable impedance output driver. International Business Machines Corporation, Howard J Walter Jr, Schmeiser Olsen & Watts, September 9, 1997: US05666078 (102 worldwide citation)

An output driver circuit is disclosed that generates an accurate and predictable output impedance driver value corresponding to a programmable external impedance. The output driver circuit includes an external resistance device, voltage comparator device, control logic, an evaluate circuit and off-c ...


6
John A Fifield, Howard L Kalter: Crosstalk-shielded-bit-line dram. International Business Machines Corporation, Howard J Walter Jr, April 23, 1991: US05010524 (94 worldwide citation)

This invention relates to semiconductor memories and includes a sense amplifier architecture in which sensed data bit or column lines are electrically isolated and shielded from their immediately adjacent active neighbors by utilization of non-selected bit lines as an AC ground bus. In its simplest ...


7
Timothy E Neary, Edward W Conrad, Orest Bula: Feedback method to repair phase shift masks. International Business Machines Corporation, Peter W Peterson, Howard J Walter Jr, DeLio & Peterson, January 18, 2000: US06016357 (89 worldwide citation)

A method of repairing a semiconductor phase shift mask comprises first providing a semiconductor mask having a defect and then illuminating the mask to create an aerial image of the mask. Subsequently, the aerial image of the mask is analyzed and the defect in the mask is detected from the aerial im ...


8
John Edward Cronin, Michael David Potter, Gorden Seth Starkey: Method for etching vertical contact holes without substrate damage caused by directional etching. International Business Machines Corporation, Howard J Walter Jr, Whitham Curtis Whitham & McGinn, August 5, 1997: US05654238 (79 worldwide citation)

A method of etching vias without directional etching damage to the substrate. A pattern image is formed on an insulating layer of known thickness over a substrate. A conformal layer is formed on the pattern image. A vertical contact hole through the conformal layer and into the insulating layer is p ...


9
Nathan R Hiltebeitel, Dale E Pontius, Steven W Tomashot: Flexible redundancy architecture and fuse download scheme. International Business Machines Corporation, Howard J Walter Jr, July 4, 1995: US05430679 (74 worldwide citation)

A fuse download system for programming decoders for redundancy. Auxiliary fuse banks have sets of fuses that store logic states that (a) select a redundant decoder and (b) indicate the address of a faulty row/column of memory cells. When the chip is first powered up, each set of fuses is accessed an ...


10
Claude Louis Bertin, Wayne John Howell, William R Tonti, Jerzy Maria Zalesinski: Through-chip conductors for low inductance chip-to-chip integration and off-chip connections. International Business Machines Corporation, Howard J Walter Jr, Schmeiser Olsen & Watts, June 25, 2002: US06410431 (70 worldwide citation)

Through-chip conductors for low inductance chip-to-chip integration and off-chip connections in a semiconductor package is disclosed. A semiconductor device has active devices on the front surface, a first through-chip conductor having first electrical/physical characteristics passing from the front ...