1
Katherina Babich
Katherina E Babich, Scott D Halle, David V Horak, Arpan P Mahorowala, Wesley C Natzle, Dirk Pfeiffer, Hongwen Yan: Etch selectivity enhancement for tunable etch resistant anti-reflective layer. International Business Machines Corporation, Yuanmin Cai Esq, Hoffman Warnick & D Alessandro, July 18, 2006: US07077903 (4 worldwide citation)

Methods for generating a nanostructure and for enhancing etch selectivity, and a nanostructure are disclosed. The invention implements a tunable etch-resistant anti-reflective (TERA) material integration scheme which gives high etch selectivity for both etching pattern transfer through the TERA laye ...


2
Eb Eshun
Anil K Chinthakindi, Timothy J Dalton, Ebenezer E Eshun, Jeffrey P Gambino, Anthony K Stamper, Kunal Vaed: Methods of fabricating passive element without planarizing. International Business Machines Corporation, Lisa U Jaklitsch, Hoffman Warnick & D Alessandro, September 23, 2008: US07427550 (3 worldwide citation)

Methods of fabricating a passive element and a semiconductor device including the passive element are disclosed including the use of a dummy passive element. A dummy passive element is a passive element or wire which is added to the chip layout to aid in planarization but is not used in the active c ...


3
Eb Eshun
Douglas D Coolbaugh, Ebenezer E Eshun, Kenneth J Stein, Kunal Vaed: Hi-K dielectric layer deposition methods. International Business Machines Corporation, Anthony J Canale, Hoffman Warnick & D Alessandro, April 8, 2008: US07354872

Methods of forming a high dielectric constant dielectric layer are disclosed including providing a process chamber including a holder for supporting a substrate, introducing a first gas comprising a high dielectric constant (Hi-K) dielectric precursor and an oxygen (O2) oxidant into the process cham ...


4
Katherina Babich
Katherina Babich, Todd C Bailey, Richard A Conti, Ryan P Deschner: Mask forming and implanting methods using implant stopping layer and mask so formed. International Business Machines Corporation, Hoffman Warnick & D Alessandro, November 29, 2007: US20070275563-A1

Methods of forming a mask for implanting a substrate and implanting using an implant stopping layer with a photoresist provide lower aspect ratio masks that cause minimal damage to trench isolations in the substrate during removal of the mask. In one embodiment, a method of forming a mask includes: ...


5
Katherina Babich
Katherina E Babich, Scott D Halle, David V Horak, Arpan P Mahorowala, Wesley C Natzle, Dirk Pfeiffer, Hongwen Yan: Etch selectivity enhancement for tunable etch resistant anti-reflective layer. International Business Machines Corporation, Hoffman Warnick & D Alessandro, May 12, 2005: US20050098091-A1

Methods for generating a nanostructure and for enhancing etch selectivity, and a nanostructure are disclosed. The invention implements a tunable etch-resistant anti-reflective (TERA) material integration scheme which gives high etch selectivity for both etching pattern transfer through the TERA laye ...


6
James Kraemer Ph.D.
James R Kraemer, David P Vernon: System and method for identifying biological growth media. International Business Machines Corporation, Hoffman Warnick & D Alessandro, March 29, 2007: US20070072304-A1

A system and method for encoding and then identifying a growth media from among a plurality of different growth media. A method is disclosed that includes: providing a set of tagging agents that are distinct from each of the different growth media; adding to each different growth media a unique subs ...


7
Eb Eshun
Anil K Chinthakindi, Timothy J Dalton, Ebenezer E Eshun, Jeffrey P Gambino, Anthony K Stamper, Kunal Vaed: Methods of fabricating passive element without planarizing and related semiconductor device. International Business Machines Corporation, Hoffman Warnick & D Alessandro, January 3, 2008: US20080003759-A1

Methods of fabricating a passive element and a semiconductor device including the passive element are disclosed including the use of a dummy passive element. A dummy passive element is a passive element or wire which is added to the chip layout to aid in planarization but is not used in the active c ...


8
Eb Eshun
Douglas D Coolbaugh, Timothy J Dalton, Daniel C Edelstein, Ebenezer E Eshun, Jeffrey P Gambino, Kevin S Petrarca, Anthony K Stamper, Richard P Volant: Planar vertical resistor and bond pad resistor and related method. International Business Machines Corporation, Hoffman Warnick & D Alessandro, August 9, 2007: US20070181974-A1

Resistors that avoid the problems of miniaturization of semiconductor devices and a related method are disclosed. In one embodiment, a resistor includes a planar resistor material that extends vertically within at least one metal layer of a semiconductor device. In another embodiment, a resistor inc ...


9
Robert J Allen, Cam V Endicott, Fook Luen Heng, Jason D Hibbeler, Kevin W McCullen, Rani Narayan, Robert F Walker, Xin Yuan: Technology migration for integrated circuits with radical design restrictions. International Business Machines Corporation, Richard M Kotulak, Hoffman Warnick & D Alessandro, November 27, 2007: US07302651 (185 worldwide citation)

A method, system and program product for migrating an integrated circuit (IC) design from a source technology without radical design restrictions (RDR) to a target technology with RDR, are disclosed. The invention implements a minimum layout perturbation approach that addresses the RDR requirements. ...


10
Travis B Bashaw, Robert T Carpenter, David A Torrey: Inverter control methodology for distributed generation sources connected to a utility grid. Advanced Energy Conversion, John A Merecki, Hoffman Warnick & D Alessandro, July 24, 2007: US07248946 (170 worldwide citation)

The present invention provides an improved control methodology for maximum power point tracking (MPPT), anti-islanding, and output current regulation for distributed generation sources connected to a utility grid. The control includes enhancements for MPPT and regulating the inverter output-current ...