31
Dalma Novak, Bo Pedersen, Quan Zhen Wang: Modular multiplexing/demultiplexing units in optical transmission systems. Dorsal Networks, Harrity &Snyder L, March 16, 2004: US06708002 (5 worldwide citation)

An optical transmission system includes a number of corresponding modular multiplexing and demultiplexing units used in transmitting and receiving an optical signal respectively. Additionally, compensation components compensate for optical dispersion experienced by the optical signal. The modular mu ...


32
Jeffrey A Shields, Jeffrey P Erhardt: Spacer etch method for semiconductor device. Advanced Micro Devices, Harrity & Snyder L, February 26, 2002: US06350696 (4 worldwide citation)

Spacers are formed on a semiconductor device by depositing a spacer layer on the semiconductor device. The semiconductor device is subjected to an anisotropic etching process to leave at least a portion of the spacer layer covering the semiconductor device. The semiconductor device is then subjected ...


33
Feng Jong Edward Yang, Bahadir Erimli: Method and apparatus for accessing external memories. Advanced Micro Devices, Harrity Snyder L, November 28, 2006: US07143185 (3 worldwide citation)

A network switch that controls the communication of data frames between stations includes receive devices that correspond to ports on the network switch. The receive devices receive and store data frame information from the network stations. The network switch also includes an external memory interf ...


34
Taihei Itai: Delay variation buffer control technique. Juniper Networks, Harrity Snyder L, June 6, 2006: US07058069 (3 worldwide citation)

A delay variation buffer controller allowing proper cell delay variation control reflecting an actual network operation status is disclosed. A detector detects an empty status of the data buffer when data is read out from the data buffer at intervals of a controllable time period. A counter counts t ...


35
Yi He, Gwyn Jones, Edward F Runnion, Mark Randolph: Methods and systems for reducing the threshold voltage distribution following a memory cell erase. Spansion, Harrity Snyder L, January 30, 2007: US07170796 (3 worldwide citation)

A method is provided for erasing a memory device including a number of memory cells, the memory cells including a substrate, a control gate, a charge storage element, a source region and a drain region. The method includes erasing a group of memory cells to lower a maximum threshold voltage of the g ...


36
Tomoharu Shimanuki, Ken Shiraishi: Dual AAL1 device and synchronization method used therewith. Juniper Networks, Harrity & Snyder L, April 19, 2005: US06882650 (3 worldwide citation)

Upon receipt of a synchronization request from the CPU, the AAL1 device of the act system causes its cell forming section to extract the allocation position information for the SAR-PDU payload about a particular time slot in the current frame and, via the synchronization information send/receive sec ...


37
Ryota Motobayashi: Switch with function for assigning queue based on forwarding rate. Juniper Networks, Harrity Snyder L, June 24, 2008: US07391726 (2 worldwide citation)

In an asynchronous transfer mode switch, a plurality of queues is provided for accumulating transfer cells, and a queue assignment processing section, receives a message for establishing a connection and assigns to the connection one of the queues having a forwarding rate close to a declared rate in ...


38
Takuji Tanimura: Hybrid type telephony system. Juniper Networks, Harrity Snyder L, June 6, 2006: US07058044 (2 worldwide citation)

The hybrid type telephony system capable of establishing a connection between conventional type telephone sets contained in an exchange unit and LAN type telephone sets contained in an IP network, the system comprising: a gateway circuit connected between the exchange unit and the IP network and per ...


39
Zhizheng Liu, Satoshi Torii, Mark Randolph, Yi He: System and method for erasing a memory cell. Spansion L L C, Harrity Snyder L, January 23, 2007: US07167398 (2 worldwide citation)

A method erases a memory cell of a semiconductor device that includes a group of memory cells. Each memory cell includes a group of storage regions. The method includes determining that each storage region of the group of storage regions of a first memory cell is to be erased and erasing the group o ...


40
Hajime Wada, Jaeyong Park, Hirokazu Tokuno, Rinji Sugino: System and method for gate formation in a semiconductor device. Spansion, Harrity Snyder L, May 22, 2007: US07220643 (1 worldwide citation)

A method for forming a memory device is provided. A memory cell stack is formed over a substrate. The memory cell stack includes a first layer formed over the substrate and a second layer formed over the first layer. A dielectric layer is formed over the first and second layers and the substrate. Th ...