1
Marcos Laraia
Jose Marcos Laraia, Masahisa Niwa, Robert P Moehrke, Jose G Taveira: Reactive sensor modules using Pade Approximant based compensation and providing module-sourced excitation. AMI Semiconductor, Matsushita Electric Works, MacPherson Kwok Chen & Heid, Gideon Gimlan, February 28, 2006: US07006938 (29 worldwide citation)

Reactive sensors typically exhibit nonlinear response to temperature variation. Systems and methods are disclosed for compensating for the nonlinear and/or temperature dependent behavior of reactive sensors and for calibrating the post-compensation output signals relative to known samples of the phy ...


2
Marcos Laraia
Jose Marcos Laraia, Jose G Taveira, Robert P Moehrke: Pade′ Approximant based compensation for integrated sensor modules and the like. AMI Semiconductor, MacPherson Kwok Chen & Heid, Gideon Gimlan, March 13, 2007: US07190178 (3 worldwide citation)

Methods and systems using Pade' Approximant expansion ratios provide mappings between nonlinear sensors and a more linearized output domain. In one embodiment (a) a variable gain amplifier receives a supplied input signal, the amplifier has at least a first input terminal, an output terminal, and a ...


3
David B Gustavson, David V James, Hans A Wiggers, Peter B Gillingham, Cormac M O&apos Connell, Bruce Millar, Jean Crepeau, Kevin J Ryan, Terry R Lee, Brent Keeth, Troy A Manning, Donald N North, Desi Rhoden, Henry Stracovsky, Yoshikazu Morooka: Memory system having synchronous-link DRAM (SLDRAM) devices and controller. Advanced Memory International, Gideon Gimlan, Fleisler Dubb Meyer & Lovejoy, August 27, 2002: US06442644 (311 worldwide citation)

A SLDRAM System is provided with a plurality of in-circuit, calibratable memory modules and a memory controller for issuing unicast and multicast command packets to the memory modules. Command packets are transmitted over a unidirectional command link that includes a complementary pair of command cl ...


4
John L Schacher: System and method for producing a drag-and-drop object from a popup menu item. Symantec Corporation, Gideon Gimlan, Fliesler Dubb Meyer & Lovejoy, December 14, 1999: US06002402 (178 worldwide citation)

A method and apparatus are provided in conjunction with a graphical user interface (GUI) for producing drag-and-drop objects (317b) from one or more choice-items (317a) presented in a choice-listing menu of a source application program (314). The so-produced drag-and-drop object is dropped onto a re ...


5
Om P Agrawal, Claudia A Stanley, Xiaojie, Larry R Metzger, Robert A Simon, Kerry A Ilgenstein: Scalable architecture for high density CPLD's having two-level hierarchy of routing resources. Lattice Semiconductor Corporation, Gideon Gimlan, Fliesler Dubb Meyer & Lovejoy, February 19, 2002: US06348813 (127 worldwide citation)

An improved, scalable CPLD device has a two-tiered hierarchical switch construct comprised of a Global Switch Matrix (GSM) and an even number of Segment Switch Matrices (SSM's). An even number of Super Logic Blocks (SLB's) are coupled to each SSM. Each SSM and its SLB's define a segme ...


6
Jeffrey A Rapaport, Seymour A Rapaport, Jeffrey E Clarke, Eric R Rinehart, Michael U Bergens: Adaptive communication methods and systems for facilitating the gathering, distribution and delivery of information related to medical care. SolveTech Corporation, MacPherson Kwok Chen & Heid, Gideon Gimlan, April 25, 2006: US07034691 (109 worldwide citation)

Automated methods and systems are disclosed for facilitating the timely gathering, monitoring, distribution and delivery of information related to medical care where such may include: (1) finding a communications channel for effectively attempting a message delivery to a specific target person at a ...


7
Jason B Feinsmith: Machine-implemented activity management system using asynchronously shared activity data objects and journal data items. Friendly Polynomials, MacPherson Kwok Chen & Heid, Gideon Gimlan, March 27, 2007: US07197502 (104 worldwide citation)

Machine-assisted methods and apparatus are disclosed for allowing individual users to develop and organize respective activity descriptions and supporting journal items according to their respective preferences. Cross-referencing mappings may be created between activity descriptions and journal item ...


8
Om P Agrawal, Fabiano Fontana, Gilles M Bosco: Enhanced CPLD macrocell module having selectable bypass of steering-based resource allocation and methods of use. Lattice Semiconductor Corporation, Gideon Gimlan, MacPherson Kwok Chen & Heid, November 18, 2003: US06650142 (101 worldwide citation)

Structures and techniques are provided for allowing one or more of the following actions to occur within a Complex Programmable Logic Device (CPLD): (1) Elective use of a fast, allocator-bypassing path (e.g., a fast 5-PT path) in combination with in-block simple or super-allocation; (2) Elective use ...


9
Arjun J Saxena: Semiconductor device with single crystal films grown on arrayed nucleation sites on amorphous and/or non-single crystal surfaces. Gideon Gimlan, Fliesler Dubb Meyer & Lovejoy, May 21, 2002: US06392253 (99 worldwide citation)

A monolithically integrated, multi-layer device is fabricated with single crystal films of desired orientation grown from arrayed nucleation sites on amorphous and/or non-single crystal surfaces. Examples of devices which can be produced are CMOS and bipolar devices in single crystal (100) and (111) ...


10
Om P Agrawal, Herman M Chang, Bradley A Sharpe Geisler, Giap H Tran, Bai Nguyen: Synthesis-friendly FPGA architecture with variable length and variable timing interconnect. Vantis Corporation, Gideon Gimlan, Fliesler Dubb Meyer & Lovejoy, October 10, 2000: US06130551 (93 worldwide citation)

A field-programmable gate array device (FPGA) having plural rows and columns of logic function units is organized with symmetrical and complementary Variable Grain Architecture (VGA) and Variable Length Interconnect Architecture (VLI). Synthesis mapping exploits the diversified and symmetric resourc ...



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