61
Iain Robertson, Karl M Guttag, Eric R Hansen: Memory configuration cache with multilevel hierarchy least recently used cache entry replacement. Texas Instruments Incorporated, Robert D Marshall Jr, Gerald E Laws, Richard L Donaldson, September 21, 1999: US05956744 (33 worldwide citation)

A multilevel hierarchical least recently used cache replacement priority in a digital data processing system including plural memories, each memory connected to said system bus for memory access, a memory address generator generating addresses for read access to a corresponding of the memories and a ...


62
Francisco A Cano, Nagaraj N Savithri, Vijaya Gunturi: Method for hierarchical parasitic extraction of a CMOS design. Texas Instruments Incorporated, Gerald E Laws, W James Brady III, Frederick J Telecky Jr, March 26, 2002: US06363516 (33 worldwide citation)

In deep submicron technologies, coupling capacitance significantly dominates the total parasitic capacitance. This causes crosstalk noise to be induced on quiescent signals which could lead to catastrophic failures. A method is provided for extracting parasitic data in a hierarchical manner from a t ...


63
Chia Cu P Mei: Method of making extended drain resurf lateral DMOS devices. Texas Instruments Incorporated, Gerald E Laws, Robby Holland, James C Kesterson, March 12, 1996: US05498554 (30 worldwide citation)

An integrated circuit containing high voltage PMOS and/or NMOS devices as well as low voltage PMOS and/or NMOS devices and a simple low cost method for making same that is adaptable to many types of semiconductor processes; furthermore, the breakdown voltage of the high voltage devices is easily adj ...


64
Kazuhiro Ohara, Masafumi Yugami: Digital color control and chroma killer device. Texas Instruments Incorporated, Gerald E Laws, C Alan McClure, Richard L Donaldson, August 5, 1997: US05654769 (30 worldwide citation)

An automatic color control and chroma killer circuit 3 and video processing system is provided that is capable of controlling an amplitude of a color signal and of performing a killer function with a simple construction without using a divider and/or vertical filter. The ACC/ACK device includes ACC ...


65
Keith Balmer: Rotation register for orthogonal data transformation. Texas Instruments Incorporated, Robert D Marshall Jr, Gerald E Laws, Richard L Donaldson, May 23, 2000: US06067613 (29 worldwide citation)

A data processing apparatus (71) includes a data processor bus (103), the rotation register (208) and a register selection circuit. The rotation register (208) is embodied by a plurality of data registers (200) each having a plurality of equal bit groups. The number of bits within each bit group of ...


66
Gary L Swoboda, David R Matt: Emulation suspend mode with instruction jamming. Texas Instruments Incorporated, Gerald E Laws, W James Brady III, Frederick J Telecky Jr, November 4, 2003: US06643803 (29 worldwide citation)

Emulation and debug circuitry is provided that can be incorporated into a variety of digital systems. A stop mode of operation is provided in which an associated processor stops processing instructions in response to a debug event. A real-time mode of operation is provided in which the processor sto ...


67
Gary L Swoboda, Jason A T Jones: Apparatus and method for automatically sequencing clocks in a data processing system when entering or leaving a low power state. Texas Instruments Incorporated, Gerald E Laws, Robert D Marshall Jr, Richard L Donaldson, May 11, 1999: US05903746 (28 worldwide citation)

A clock acquisition subsystem for a data processing system has an interlocked clock multiplexer 100 for acquiring a clock source which is provided as clock signal 102 to the data processing system. Multiplexer 100 has at least two inputs 104 and 106 for clock source signals. Each clock source signal ...


68
Stephen Hsiao Yi Li, Frank L Laczko Sr, Jonathan Rowlands: Device and method for extracting a bit field from a stream of data. Texas Instruments Incorporated, Gerald E Laws, James C Kesterson, Richard L Donaldson, November 10, 1998: US05835793 (28 worldwide citation)

A data processing device uses a portion of a random access memory as an input buffer 114 for holding a portion of a stream of data which is being processed by a processing unit within the processing device. A Get Bit-Field instruction is provided which directs the processing unit to extract selected ...


69
Horst Diewald: Microprocessors or microcontroller utilizing FLL clock having a reduced power state. Texas Instruments Incorporated, Richard L Donaldson, Gerald E Laws, September 8, 1998: US05805909 (28 worldwide citation)

A microprocessor or micro-controller of a module design and adapted for low power is described. Each of the modules is addressed and controlled by the CPU in the same way. All assembler instructions and all address modes can be applied to each module. Also, all 16 registers of the CPU are identical ...


70
Gary L Swoboda: Integrated circuit design system with shared hardware accelerator and processes of designing integrated circuits. Texas Instruments Incorporated, Gerald E Laws, Robert D Marshall Jr, Richard L Donaldson, August 10, 1999: US05937179 (28 worldwide citation)

An interactive environment is provided for integrated circuit (IC) designers to do an emulation session on a hardware accelerator 111 and then move to simulator 131, and vice versa. An aspect of the present inventive solution swaps memory state and logic storage node state (such as flip-flops and la ...