51
David A Figoli: Analog to digital converter with configurable sequence controller. Texas Instruments Incorporated, Gerald E Laws, W James Brady III, Frederick J Telecky Jr, November 26, 2002: US06486809 (37 worldwide citation)

A digital system is provided with an Analog to Digital converter (ADC) that has a configuration that allows a programmable number of Auto conversions to occur on two separate and independent, but cascadeable, sequencers (or state machines). For each conversion state, the sequencer/s can be programme ...


52

53
Gary L Swoboda: Apparatus for cleanly switching between various clock sources in a data processing system. Texas Instruments Incorporated, Gerald E Laws, James C Kesterson, Richard L Donaldson, August 4, 1998: US05790609 (36 worldwide citation)

A clock acquisition subsystem for a data processing system has an interlocked clock multiplexer 100 for acquiring a clock source which is provided as clock signal 102 to the data processing system. Multiplexer 100 has at least two inputs 104 and 106 for clock source signals. Each clock source signal ...


54
Douglas E Deao, Natarajan Seshan, Anthony J Lell: Maintaining synchronism between a processor pipeline and subsystem pipelines during debugging of a data processing system. Texas Instruments Incorporated, Gerald E Laws, Robert D Marshall Jr, Richard L Donaldson, October 19, 1999: US05970241 (36 worldwide citation)

A data processing system on an integrated circuit 42 with microprocessor 1 and peripheral devices 60-61 is provided with an emulation unit 50 which allows debugging and emulation of integrated circuit 42 when connected to an external test system 51. Microprocessor 1 has in instruction execution pipe ...


55
James E Brooks, Robert R Collins, Jonathan H Shiell: Microprocessor with circuits, systems, and methods for interrupt handling during virtual task operation. Texas Instruments Incorporated, Robert D Marshall Jr, Gerald E Laws, Richard L Donaldson, October 26, 1999: US05974440 (35 worldwide citation)

In a microprocessor embodiment (26), the microprocessor is operable to multi-task a plurality of programs, wherein the plurality of programs include a virtual program (38, 40) operable in a virtual mode and a monitor program (36) in a protected mode. The microprocessor includes an interrupt handling ...


56
Michael C Smayling, Manuel L Torreno Jr deceased: Method of fabricating lateral double diffused MOS (LDMOS) transistors. Texas Instruments Incorporated, Gerald E Laws, C Alan McClure, James C Kesterson, December 17, 1996: US05585294 (35 worldwide citation)

A process for the fabrication of an improved LDMOS transistor, and such an improved LDMOS transistor are provided. The improved LDMOS transistor is in a semiconductor layer of a first conductivity type. The transistor has a source and drain of a second conductivity type (opposite the first conductiv ...


57
Douglas E Deao, Natarajan Seshan: Resuming normal execution by restoring without refetching instructions in multi-word instruction register interrupted by debug instructions loading and processing. Texas Instruments Incorporated, Gerald E Laws, Robert D Marshall Jr, Richard L Donaldson, May 16, 2000: US06065106 (34 worldwide citation)

A data processing system on an integrated circuit 42 with microprocessor 1 and peripheral devices 60-61 is provided with an emulation unit 50 which allows debugging and emulation of integrated circuit 42 when connected to an external test system 51. Microprocessor 1 has in instruction execution pipe ...


58
Gary L Swoboda, David R Matt: Emulation suspend mode with differing response to differing classes of interrupts. Texas Instruments Incorporated, Gerald E Laws, W James Brady III, Frederick J Telecky Jr, April 22, 2003: US06553513 (34 worldwide citation)

Emulation and debug circuitry is provided that can be incorporated into a variety of digital systems. A stop mode of operation is provided in which an associated processor stops processing instructions in response to a debug event. A real-time mode of operation is provided in which the processor sto ...


59
Yuji Yaguchi: Method for reading data in a memory cell. Texas Instruments Incorporated, Gerald E Laws, William B Kempler, Richard L Donaldson, January 12, 1999: US05860084 (33 worldwide citation)

A method of reading a memory cell containing an access transistor, a word line and a memory storage for holding information. The access transistor having a control terminal is connected to the word line. The memory storage is connected to the access transistor and thereby to a sense amplifier throug ...


60
Gerard Chauvel, Serge Lasserre, Mario Giani, Tiemen Spits: Transport stream packet parser system. Texas Instruments Incorporated, Gerald E Laws, W James Brady III, Frederick J Telecky Jr, May 1, 2001: US06226291 (33 worldwide citation)

A transport stream parser system is provided that utilizes an intermediate buffer for containing packets after processing with an associated flag and then use a processor for further processing of packets selected by such flags.