41
James O Bondi, Simonjit Dutta, Ashwini K Nanda: Pipelined microprocessor with branch misprediction cache circuits, systems and methods. Texas Instruments Incorporated, Robert D Marshall Jr, Gerald E Laws, Richard L Donaldson, March 9, 1999: US05881277 (46 worldwide citation)

A microprocessor comprising an instruction pipeline (36) comprising a plurality of successive instruction stages. An instruction passes from a beginning stage (38), through a plurality of intermediary stages (40 through 52), and to an ending stage (54) of the plurality of successive instruction stag ...


42
Stanley J Goldman: Ring oscillator. Texas Instruments Incorporated, Robert D Marshall Jr, Gerald E Laws, Richard L Donaldson, June 27, 2000: US06081165 (45 worldwide citation)

An improved ring oscillator (10, 70) includes a first, second and third current starved inverters (12, 14, 16) coupled in a ring, a first fast inverter (40) coupled between the second and third current starved inverters (14, 16), and a second fast inverter (45) coupled between the third and first cu ...


43
Jean Pierre Giacalone, Anne Lombardot, Francois Theodorou: Rounding mechanisms in processors. Texas Instruments Incorporated, Gerald E Laws, W James Brady III, Frederick J Telecky Jr, May 16, 2006: US07047272 (42 worldwide citation)

An arithmetic unit, for example a multiply and accumulate (MAC) unit 42, for a processing engine includes a partial product reduction tree 480. The partial product reduction tree will generate carry results and provides a final output to a final adder 470 connected to the partial production reductio ...


44
David A Russo, Robert E Frankel: Memory management in embedded systems with dynamic object instantiation. Texas Instruments Incorporated, Gerald E Laws, W James Brady III, Frederick J Telecky Jr, April 8, 2003: US06546477 (42 worldwide citation)

A system and method is provided for enabling the reuse of algorithms in multiple application frameworks with no alterations required of the algorithm once it is developed. An inverted memory allocation mechanism enables various algorithm modules to be integrated into a single application without mod ...


45
Katsuhiro Aoki, Yukio Fukuda, Ken Numata, Yasutoshi Okuno, Akitoshi Nishimura: Method for manufacturing dielectric capacitor, dielectric memory device. Texas Instruments Incorporated, Gerald E Laws, William B Kempler, Richard L Donaldson, March 7, 2000: US06033953 (41 worldwide citation)

A dielectric capacitor is provided which has a reduced leakage current. The surface of a first electrode (38) of the capacitor is electropolished and a dielectric film (40) and a second electrode (37) are successively laminated on it. The convex parts pointed end (38a) existing on the surface of the ...


46
Gary L Swoboda, Eric J Stotzer: Method for testing an integrated circuit with user definable trace function. Texas Instruments Incorporated, Gerald E Laws, Robert D Marshall Jr, Richard L Donaldson, March 16, 1999: US05884023 (40 worldwide citation)

A method for testing a digital processor 11 in which a test port 1149 is used to transfer trace data from the digital processor to a test host processor 1101 under control of a user definable program which executes in response to predetermined events on the digital processor. Trace data is gathered ...


47
Jonathan H Shiell: Superscalar microprocessor having combined register and memory renaming circuits, systems, and methods. Texas Instruments Incorporated, Robert D Marshall Jr, Gerald E Laws, Richard L Donaldson, June 8, 1999: US05911057 (40 worldwide citation)

Circuits, systems, and methods of operating a processor (110) to process a plurality of instructions, wherein each of the plurality of instructions has a respective sequence number. Further, selected ones of the plurality of instructions are for accessing a non-register memory (18). For each of the ...


48
Douglas E Deao, Natarajan Seshan, Anthony J Lell: Processor test port with scan chains and data streaming. Texas Instruments Incorporated, Gerald E Laws, Robert D Marshall Jr, Richard L Donaldson, April 25, 2000: US06055649 (39 worldwide citation)

A data processing system on an integrated circuit 42 with microprocessor 1 and peripheral devices 60-61 is provided with an emulation unit 50 which allows debugging and emulation of integrated circuit 42 when connected to an external test system 51. Microprocessor 1 has in instruction execution pipe ...


49
Frank L Laczko Sr, Gerard Benbassat, Kenneth R Cyr, Stephen H Li, Shiu Wai Kam, Karen L Walker, Jonathan L Rowlands: Integrated audio decoder system and method of operation. Texas Instruments Incorporated, Gerald E Laws, C Alan McClure, Richard L Donaldson, July 1, 1997: US05644310 (38 worldwide citation)

A data processing system (10) is disclosed which comprises a microprocessor host (12) coupled to a decoding system (14). A host interface block (18) receives a bit stream and passes bit stream on to a system decoder block (20). The system decoder block (20) extracts the appropriate data from the bit ...


50
Bernhard H Andresen, Roger A Cline: CMOS triggered NMOS ESD protection circuit. Texas Instruments Incorporated, Gerald E Laws, W James Brady III, Frederick J Telecky Jr, November 14, 2000: US06147538 (37 worldwide citation)

An integrated circuit is provided with electrostatic discharge (ESD) protection circuitry (120) A substrate region in the semiconductor substrate is enclosed by a ring of highly doped region (350). An NMOS ESD protection transistor (N1) with its backgate in the enclosed substrate region can be volta ...