1
Robert Senzig
Srikanth Suryanarayanan, Rakesh Mullick, Vidya Pundalik Kamath, Yogisha Mallya, Robert F Senzig: Method and apparatus for partitioning a volume. Patrick S Yoder, Fletcher Yoder & Van Someren, May 27, 2004: US20040101179-A1

A technique is provided for partitioning an imaged volume into two or more sub-volumes. The technique identifies partition lines which separate the sub-volumes by generating a profile, such as a bone profile, which is then analyzed to determine the placement of the partition lines. In one embodiment ...


2
Steven T Harshfield: Contact structure and memory element incorporating the same. Micron Technology, Fletcher Yoder & Van Someren, February 29, 2000: US06031287 (438 worldwide citation)

Annular and linear contact structures are described which exhibit a greatly reduced susceptibility to process deviations caused by lithographic and deposition variations than does a conventional circular contact plug. In one embodiment, a standard conductive material such as carbon or titanium nitri ...


3
Alan R Reinberg: Chalcogenide memory cell with a plurality of chalcogenide electrodes. Micron Technology, Fletcher Yoder & Van Someren, July 6, 1999: US05920788 (424 worldwide citation)

A chalcogenide memory cell with chalcogenide electrodes positioned on both sides of the active chalcogenide region of the memory cell. The chalcogenide memory cell includes upper and lower chalcogenide electrodes with a dielectric layer positioned therebetween. The dielectric layer includes an openi ...


4
Steven T Harshfield: Method of making an integrated circuit electrode having a reduced contact area. Micron Technology, Fletcher Yoder & Van Someren, September 12, 2000: US06117720 (411 worldwide citation)

A method and an apparatus for manufacturing a memory cell having a non-volatile resistive memory element with a limited size active area. The method comprises a first step of providing a dielectric volume and forming a plug opening within the dielectric volume. A recessed plug of a conductive materi ...


5
Graham R Wolstenholme, Fernando Gonzalez, Russell C Zahorik: Memory cell incorporating a chalcogenide element and method of making same. Micron Technology, Fletcher Yoder & Van Someren, May 22, 2001: US06236059 (395 worldwide citation)

A memory cell incorporating a chalcogenide element and a method of making same is disclosed. In the method, a doped silicon substrate is provided with two or more polysilicon plugs to form an array of diode memory cells. A layer of silicon nitride is disposed over the plugs. Using a poly-spacer proc ...


6
Steven T Harshfield: Memory array having a multi-state element and method for forming such array or cellis thereof. Micron Technology, Fletcher Yoder & Van Someren, June 20, 2000: US06077729 (385 worldwide citation)

A memory device having a plurality of memory arrays. Each array has a plurality of memory cells, each memory cell including an electrode defining a respective contact area. Each memory array is formed by depositing a continuous chalcogenide layer. This chalcogenide layer, even when continuous, will ...


7
Steven T Harshfield: Method and apparatus for forming an integrated circuit electrode having a reduced contact area. Micron Technology, Fletcher Yoder & Van Someren, July 16, 2002: US06420725 (374 worldwide citation)

A method and an apparatus for manufacturing a memory cell having a non-volatile resistive memory element with a limited size active area. The method comprises a first step of providing a dielectric volume and forming a plug opening within the dielectric volume. A recessed plug of a conductive materi ...


8
Steven T Harshfield: Memory array having a multi-state element and method for forming such array or cells thereof. Micron Technology, Fletcher Yoder & Van Someren, February 9, 1999: US05869843 (367 worldwide citation)

A memory device having a plurality of memory arrays. Each array has a plurality of memory cells, each memory cell including an electrode defining a respective contact area. Each memory array is formed by depositing a continuous chalcogenide layer. This chalcogenide layer, even when continuous, will ...


9
Alan R Reinberg, Russell C Zahorik deceased: Small electrode for a chalcogenide switching device and method for fabricating same. Micron Technology, Fletcher Yoder & Van Someren, September 14, 1999: US05952671 (262 worldwide citation)

A memory cell and a method of fabricating the memory cell having a small active area. By forming a spacer in a window that is sized at the photolithographic limit, a pore may be formed in dielectric layer which is smaller than the photolithographic limit. Electrode material is deposited into the por ...


10
Steven T Harshfield: Method of forming a contact structure in a semiconductor device. Micron Technology, Fletcher Yoder & Van Someren, August 27, 2002: US06440837 (261 worldwide citation)

Annular and linear contact structures are described which exhibit a greatly reduced susceptibility to process deviations caused by lithographic and deposition variations than does a conventional circular contact plug. In one embodiment, a standard conductive material such as carbon or titanium nitri ...