51
Wieczorek Karsten, Raab Michael, Burbach Gert: Method of compensating for material loss in a metal silicide layer in contacts of integrated circuit devices. Advanced Micro Devices, DRAKE Paul S, January 18, 2001: WO/2001/004947

There is provided a semiconductor device comprising, for example, an MOS structure (101) having a low electrical resistance in contacts and local interconnects, and a method for fabricating the device. When openings (102) are formed in a dielectric region (119) of an MOS structure (101), the thin me ...


52
Toprac Anthony J: Method of improved estimation of critical dimensions in microelectronic fabrication. Advanced Micro Devices, DRAKE Paul S, March 29, 2001: WO/2001/022183

A method is provided for manufacturing, the method including processing a workpiece (100) in a processing step (105), measuring (110) a critical dimension of features (205) formed on the workpiece using a test structure (200) formed on the workpiece (100), the test structure (200) including a plural ...


53
Guercio David J, Greenwell Paul E, Borland David J: Telephone calling party announcement system and method. Advanced Micro Devices, DRAKE Paul S, January 8, 1998: WO/1998/000958

Presented is a telephone calling party announcement system which stores telephone numbers and associated voice messages provided by a user. When an incoming telephone call occurs, and a telephone number of a calling party matches a stored telephone number, an associated stored voice message is playe ...


54
Gardner Mark I, Hause Fred N: Ultra short trench transistors and process for making same. Advanced Micro Devices, DRAKE Paul S, March 19, 1998: WO/1998/011610

A field effect transistor comprising a semiconductor substrate (100) having a transistor trench extending downward from an upper surface of the semiconductor substrate. The trench extends to a trench depth below an upper surface of the semiconductor substrate. The transistor further includes a gate ...


55
Wu David Donggang, Cheek Jon D: Method of forming resistive structures. Advanced Micro Devices, Wu David Donggang, Cheek Jon D, DRAKE Paul S, December 2, 2004: WO/2004/105135

A resistive structure (102) formed overlying a semiconductor substrate is masked with a silicide block layer (120) to define a portion of the resistive structure that is to be unsilicided and a portion of the resistive structure to be silicided. The silicide block layer (120) is changed to facilitat ...


56
Hellig Kay, Amnipur Massud: Method of manufacturing multi-level contacts by sizing of contact sizes in integrated circuits. Advanced Micro Devices, DRAKE Paul S, February 12, 2004: WO/2004/013908

A method [600] for forming an integrated circuit includes etching a first opening [228] [338] [402] to a first depth in a dielectric material [322] over a semiconductor device [317] on a first semiconductor substrate [202] and etching a second opening [230] [340] [404] to a second depth in the diele ...


57
Filippo Michael A, Pickett James K, Sander Benjamin T, Gopal Rama S: Load store unit with replay mechanism. Advanced Micro Devices, Filippo Michael A, Pickett James K, Sander Benjamin T, Gopal Rama S, DRAKE Paul S, December 23, 2004: WO/2004/111839

A microprocessor (100) may include a scheduler (118) configured to issue operations and a load store unit (126C) configured to execute memory operations issued by the scheduler (118). The load store unit (126C) is configured to store information identifying memory operations issued to the load store ...


58
Filippo Michael A, Pickett James K: Store-to-load forwarding buffer using indexed lookup. Advanced Micro Devices, Filippo Michael A, Pickett James K, DRAKE Paul S, February 3, 2005: WO/2005/010750

A microprocessor (100) may include a dispatch unit (104) configured to dispatch load and store operations and a load store unit (126) configured to store information associated with load and store operations dispatched by the dispatch unit (104). The load store unit (126) includes a STLF (Store-to-L ...


59
Ruelke Hartmut, Hohage Joerg, Werner Thomas, Aminpur Massud: An improved barrier layer for a copper metallization layer including a low k dielectric. Advanced Micro Devices, DRAKE Paul S, May 13, 2004: WO/2004/040623

The effect of resist poisoning may be eliminated or at least substantially reduced in the formation of a low-k metallization layer, in that a nitrogen-containing barrier/etch stop layer (250) is provided with a significantly reduced nitrogen concentration at an interface (251) in contact with said l ...


60
Eckhardt Uwe, Sachse Eric, Kuhn Ingo: Complementary code decoding by reduced sized circuits. Advanced Micro Devices, DRAKE Paul S, May 13, 2004: WO/2004/040784

A complementary code decoder technique is provided where the encoded input data is first parallelized. From the parallelized data, correlation values are generated by a correlator circuit that is capable of changing its correlation characteristics depending on at least one control signal. Different ...