1
Thomas R Kirkman: Apparatus and method for retaining a catheter in a blood vessel in a fixed position. David V Seed and Berry Carlson, April 23, 1996: US05509900 (244 worldwide citation)

A method and apparatus for retaining a catheter tip in a fixed position within a blood flow and preventing it from contacting a blood vessel wall. The apparatus includes a tip retainer at the distal end of the catheter that anchors the tip of the catheter within the blood vessel. The catheter tip is ...


2
Michel Marty, Herve Jaouen: Transformer for integrated circuits. STMicroelectronics, Theodore E Galanthay, David V Seed and Berry Carlson, February 29, 2000: US06031445 (121 worldwide citation)

A invention provides a transformer for use in integrated circuits, comprising four layers of conductive lines, separated from each other by first, second and third insulating layers. First conductive vias traverse the second insulating layer to connect said second and third pluralities of conducting ...


3
Felix Trampler, Ewald Benes, Wolfgang Burger, Martin Groschl: Multilayered piezoelectric resonator for the separation of suspended particles. SonoSep Biotech, David V Seed and Berry Carlson, January 27, 1998: US05711888 (106 worldwide citation)

Particulate material suspended in a fluid is separated and recycled by means of an ultrasonic resonance wave. In a preferred embodiment, the ultrasonic resonance field is generated within a multilayered composite resonator system including a transducer, the suspension and a mirror parallel to each o ...


4
Maria R Borghi, Paolo Sandri: Buck converter with operating mode automatically determined by the load level. SGS Microelectronics S r l, David V Seed and Berry Carlson, April 1, 1997: US05617016 (59 worldwide citation)

A DC-to-DC (buck) converter comprises a PWM regulation loop and a hysteretic control loop, which are alternatively enabled by a mode selection circuit of the converter in function of the load level. When the level of load drops below a preset limit related to a design load level, the converter passe ...


5
Silvia Padoan, Luigi Pascucci: Programmable logic array structure for semiconductor nonvolatile memories, particularly flash-eeproms. SGS Thomson Microelectronics S r l, David V Seed and Berry Carlson, September 24, 1996: US05559449 (53 worldwide citation)

The PLA, which implements a state machine of a nonvolatile memory, presents a dynamic NAND-NOT-NOR configuration, and the timing signals for correct reading of the PLA are generated by a clock generator which generates a monostable succession of read enabling signals on receiving a predetermined swi ...


6
Giovanni Campardo, Lorenzo Bedarida, Giuseppe Fusillo, Andrea Silvagni: EEPROM memory device with simultaneous read and write sector capabilities. SGS Thomson Microelectronics S r l, David V Seed and Berry Carlson, May 5, 1998: US05748528 (49 worldwide citation)

A memory device having a memory array, a row decoding unit, a column decoding unit, and a control unit; the memory array presents global bit lines extending along the whole of the array and connected to respective local bit lines, one for each of the sectors; a switch is provided between the global ...


7
Giovanni Campardo: Sense amplifier circuit for semiconductor memory devices. STMicroelectronics S r l, David V Seed and Berry Carlson, November 9, 1999: US05982666 (46 worldwide citation)

A sense amplifier circuit for a semiconductor memory device comprises first current/voltage conversion means for converting a current of a memory cell to be read into a voltage signal, second current voltage/conversion means for converting a reference current into a reference voltage signal, and vol ...


8
Maria R Borghi, Pietro Menniti: DC-to-DC converter operating in a discontinuous mode. SGS Thomson Microelectronics S r l, David V Seed and Berry Carlson, March 18, 1997: US05612610 (41 worldwide citation)

A converter employs a comparator sensing the current through an output diode, for generating a confirmation signal of an OFF state of the switch until the discharge current of the inductor toward the user circuit and the external filter capacitance has become null, thus ensuring the operation in a d ...


9
Luigi Pascucci, Marco Olivo, Carla Maris Golla: Internal timing method and circuit for programmable memories. SGS Thomson Microelectronics S r l, David V Seed and Berry Carlson, September 2, 1997: US05663921 (38 worldwide citation)

A circuit generates flexible timing permitting a slow or fast overall timing configuration, and two configurations of the precharge and detecting intervals by providing both with two (short or long) duration levels. For this purpose, the circuit includes a variable, asymmetrical propagation line com ...


10
Marco Pasotti, Pier Luigi Rolandi, Roberto Canegallo, Danilo Gerna, Ernestina Chioffi: Method for multilevel programming of a nonvolatile memory, and a multilevel nonvolatile memory. STMicroelectronics S r l, Theodore E Gallanthay, David V Seed and Berry Carlson, January 4, 2000: US06011715 (34 worldwide citation)

A programming method for a nonvolatile memory includes the steps of: a) determining a current value of the threshold voltage; b) acquiring a target value of the threshold voltage; c) calculating a first number of gate voltage pulses necessary to take the threshold voltage from the current value to t ...