1
Chandramouli Visweswariah, Jinjun Xiong, Vladimir Zolotov: Method, system, and program product for computing a yield gradient from statistical timing. International Business Machines Corporation, Brian Verminski, Hoffman Warnick, January 20, 2009: US07480880 (187 worldwide citation)

The invention provides a method, system, and program product for determining a gradient of a parametric yield of an integrated circuit with respect to parameters of a delay of an edge of a timing graph of the circuit. A first aspect of the invention provides a method for determining a gradient of a ...


2
Rajiv V Joshi, Keunwoo Kim, Edward J Nowak, Richard Q Williams: Dynamic control of back gate bias in a FinFET SRAM cell. International Business Machines Corporation, Brian Verminski, Joffman Warnick, March 23, 2010: US07681628 (96 worldwide citation)

The present invention provides dynamic control of back gate bias on pull-up pFETs in a FinFET SRAM cell. A method according to the present invention includes providing a bias voltage to a back gate of at least one transistor in the SRAM cell, and dynamically controlling the bias voltage based on an ...


3
Matthew J Breitwisch, Gary S Ditlow, Michele M Franceschini, Luis A Lastras Montano, Robert K Montoye, Bipin Rajendran: Resistive memory devices having a not-and (NAND) structure. International Business Machines Corporation, Cantor Colburn, Brian Verminski, January 31, 2012: US08107276 (66 worldwide citation)

Resistive memories having a not-and (NAND) structure including a resistive memory cell. The resistive memory cell includes a resistive memory element for storing a resistance value and a memory element access device for controlling access to the resistive memory element. The memory element access de ...


4
Harold W Cain III, Gheorghe C Cascaval, Maged M Michael: Transactional block conflict resolution based on the determination of executing threads in parallel or in serial mode. International Business Machines Corporation, Francis Lammes, Stephen J Walder Jr, Brian Verminski, September 17, 2013: US08539486 (39 worldwide citation)

Mechanisms are provided for handling conflicts in a transactional memory system. The mechanisms execute threads in a data processing system in a first conflict resolution mode of operation in which threads execute conflicting transactional blocks speculatively. The mechanisms determine, for a transa ...


5
John Peter Karidis, Clifford Alan Pickover: Apparatus and method for display power saving. International Business Machines Corporation, Keusey Tutunjian & Bitetto P C, Brian Verminski Esq, November 3, 2009: US07614011 (38 worldwide citation)

A power saving method for self-luminous displays and an apparatus thereof, comprises determining active and inactive portions of a display screen. The inactive portions of the display screen are modified in accordance with criteria to save power by reducing energy consumption of the inactive portion ...


6
Chandramouli Visweswariah: System and method for statistical timing analysis of digital circuits. International Business Machines Corporation, Brian Verminski, Hoffman Warnick, September 23, 2008: US07428716 (21 worldwide citation)

The present invention is a system and method for statistical or probabilistic static timing analysis of digital circuits, taking into account statistical delay variations. The delay of each gate or wire is assumed to consist of a nominal portion, a correlated random portion that is parameterized by ...


7
Michele M Franceschini, Ashish Jagmohan, John P Karidis, Luis A Lastras Montano: Adaptive endurance coding of non-volatile memories. International Business Machines Corporation, Cantor Colburn, Brian Verminski, December 25, 2012: US08341501 (20 worldwide citation)

Adaptive endurance coding including a method for storing data that includes receiving write data and a write address. A compression algorithm is applied to the write data to generate compressed data. An endurance code is applied to the compressed data to generate a codeword. The endurance code is se ...


8
Harry S Barowski, J Adam Butts, Stephen V Kosonocky, Silvia M Mueller, Jochen Preiss: Multiplexing output from second execution unit add/saturation processing portion of wider width intermediate result of first primitive execution unit for compound computation. International Business Machines Corporation, Cantor Colburn, Brian Verminski, April 6, 2010: US07694112 (20 worldwide citation)

A method for executing multiple computational primitives is provided in accordance with exemplary embodiments. A first computational unit and at least a second computational unit cooperate to execute multiple computational primitives. The first computational unit independently computes other computa ...


9
Chih Chao Yang, Louis C Hsu, Rajiv V Joshi: Interconnect structure and method for forming the same. International Business Machines Corporation, Brian Verminski, Hoffman Warnick, June 1, 2010: US07727888 (18 worldwide citation)

An interconnect structure and a method for forming the same are described. Specifically, under the present invention, a gouge is created within a via formed in the interconnect structure before any trenches are formed. This prevents the above-mentioned trench damage from occurring. That is, the bott ...


10
Prashant Pradhan, Debanjan Saha, Sambit Sahu, Manpreet Singh: Methods and computer program products for managing application performance on a network. International Business Machines Corporation, Cantor Colburn, Brian Verminski, August 23, 2011: US08005935 (16 worldwide citation)

Managing application performance on a network. A network graph is generated from a set of application endpoints on the network. The network graph is annotated by associating one or more of the application endpoints with at least one of a corresponding latency annotation or a corresponding available ...