1
Christophe Pierrat, Youping Zhang: Dissection of printed edges from a fabrication layout for correcting proximity effects. Synopsys, Beyer Hoffman & Harms, Jeanette S Harms, July 12, 2005: US06918104 (189 worldwide citation)

Techniques for fabricating a device include forming a fabrication layout, such as a mask layout, for a physical design layer, such as a design for an integrated circuit, and identifying evaluation points on an edge of a polygon corresponding to the design layer for correcting proximity effects. Tech ...


2
David Kirtland Fork, Jackson Ho, Rachel King ha Lau, JengPing Lu: Spring structure with self-aligned release material. Xerox Corporation, Patrick T Bever, Beyer Hoffman & Harms, March 26, 2002: US06361331 (27 worldwide citation)

Efficient methods for lithographically fabricating spring structures onto a substrate containing contact pads or metal vias by forming both the spring metal and release material layers using a single mask. Specifically, a pad of release material is self-aligned to the spring metal finger using a pho ...


3
Mahesh Iyer, Ashish Kapoor: Non-linear, gain-based modeling of circuit delay for an electronic design automation system. Synopsys, Beyer Hoffman & Harms, Jeanette S Harms, June 28, 2005: US06912702 (9 worldwide citation)

A non-linear, gain-based modeling of circuit delay within an electronic design automation system. The present invention provides a scalable cell model for use in early logic structuring and mapping for the design of integrated circuits. The scalable cell model includes a four dimensional delay model ...


4
Malcolm G Smith Sr: Rotable portable card having a data storage device, apparatus and method for using same. UltraCard, Beyer Hoffman & Harms, Patrick T Bever, November 29, 2005: US06969006 (8 worldwide citation)

A portable card adapted to be used in a card processing system having a data processing station is shown. The portable card includes a data storage device which is adapted to interact with a data processing station when a portable card and a data processing station are rotationally moved relative to ...


5
Tsu Jae King: Silicon on insulator (SOI) negative differential resistance (NDR) based memory device with reduced body effects. Progressant Technologies, Beyer Hoffman & Harms, Jeanette S Harms, March 8, 2005: US06864104 (6 worldwide citation)

A silicon-on-insulator (SOI) memory device (such as an SRAM) using negative differential resistance (NDR) elements is disclosed. Body effect performances for NDR FETs (and other FETs) that may be used in such device are enhanced by floating a body of some/all the NDR FETs.


6
Tsu Jae King: Negative differential resistance load element. Synopsys, Beyer Hoffman & Harms, Jeanette S Harms, August 23, 2005: US06933548 (3 worldwide citation)

A negative differential resistance device is disclosed which is particularly suited as a replacement in memory cells for conventional pull-up and load elements such as NDR diodes, passive resistors, and conventional FETs. The NDR device includes a charge trapping layer formed at or extremely near to ...


7
Sorin S Georgescu, A Peter Cosmin: Scalable electrically eraseable and programmable memory (EEPROM) cell array. Semiconductor Components Industries L L C, Beyer Hoffman & Harms, E Eric Hoffman, January 10, 2012: US08093650 (1 worldwide citation)

A non-volatile memory (NVM) system includes a plurality of NVM cells fabricated in a dual-well structure. Each NVM cell includes an access transistor and an NVM transistor, wherein the access transistor has a drain region that is continuous with a source region of the NVM transistor. The drain regio ...


8
Martin L Voogel: Method for fabricating PLDs including multiple discrete devices formed on a single chip. Xilinx, Beyer Hoffman & Harms, March 26, 2002: US06362651 (1 worldwide citation)

A method for producing multi-device PLDs wherein a wafer layout architecture includes device-linking conductors that allow a wafer to be diced into both single-device chips and multi-device chips. A multi-device chip is a single chip that includes two or more discrete PLD circuits that are connected ...