1
Dhrubajyoti Borthakur, Nur Premo, Joseph Pasqua: System and method for detecting and storing file content access information within a file system. Veritas Operating Corporation, Meyertons Hood Kivlin Kowert & Goetzel P C, B Noël Kivlin, Anthony M Petro, September 18, 2007: US07272606 (211 worldwide citation)

In one embodiment, a system may include a storage device configured to provide a storage space for data storage and a file system configured to map files to the storage space for storage and to manage application accesses to the storage device. The file system may be configured to determine a signat ...


2
Jeffry E Gonion: Processing vectors using wrapping minima and maxima instructions in the macroscalar architecture. Apple, Anthony M Petro, Meyertons Hood Kilvin Kowert & Goetzel P C, October 8, 2013: US08555037 (102 worldwide citation)

Embodiments of a system and a method in which a processor may execute instructions that cause the processor to receive an input vector and a control vector are disclosed. The executed instructions may also cause the processor to perform a minima or maxima operation on another input vector dependent ...


3
Bruce J Chang, Ricky C Hetherington, Brian J McGee, David M Kahn, Ashley N Saulsbury: Processor and method for device-specific memory address translation. Sun Microsystems, Robert C Kowert, Anthony M Petro, Meyertons Hood Kivlin Kowert & Goetzel P C, February 3, 2009: US07487327 (46 worldwide citation)

A processor employing device-specific memory address translation. In one embodiment, a processor may include a device interface configured to receive a memory access request from an input/output (I/O) device, where the request specifies a virtual memory address and a first requestor identifier (ID) ...


4
Michael B Doerr, William H Hallidy, David A Gibson, Craig M Chase: Processing system with interspersed stall propagating processors and communication elements. Coherent Logix Incorporated, Meyertons Hood Kivlin Kowert & Goetzel P C, Jeffrey C Hood, Anthony M Petro, August 19, 2008: US07415594 (46 worldwide citation)

A processing system comprising processors and the dynamically configurable communication elements coupled together in an interspersed arrangement. The processors each comprise at least one arithmetic logic unit, an instruction processing unit, and a plurality of processor ports. The dynamically conf ...


5
Jeffrey S Brooks, Christopher H Olson, Robert T Golla: Apparatus and method to support pipelining of differing-latency instructions in a multithreaded processor. Sun Microsystems, Robert C Kowert, Anthony M Petro, Meyertons Hood Kivlin Kowert & Goetzel P C, January 13, 2009: US07478225 (43 worldwide citation)

An apparatus and method to support pipelining of variable-latency instructions in a multithreaded processor. In one embodiment, a processor may include instruction fetch logic configured to issue a first and a second instruction from different ones of a plurality of threads during successive cycles. ...


6
Ronald S Karr, Randall Ko Shingai, Michael Root: System and method for implementing volume sets in a storage system. Symantec Operating Corporation, Meyertons Hood Kivlin Kowert & Goetzel P C, B Noël Kivlin, Anthony M Petro, September 9, 2008: US07424592 (41 worldwide citation)

Systems and methods for implementing volume sets in a storage system. According to a first embodiment, a system may include a volume server, a first and a second client computer system, and a plurality of physical block devices. The volume server may be configured to aggregate storage in the plurali ...


7
Ronald S Karr, Kalaivani Arumugham, Anand A Kekre, Poonam Dhavale: System and method for performing snapshots in a storage environment employing distributed block virtualization. Symantec Operating Corporation, Meyertons Hood Kivlin Kowert & Goetzel P C, B Noël Kivlin, Anthony M Petro, June 17, 2008: US07389394 (32 worldwide citation)

Systems and methods for performing snapshots in a storage environment employing distributed block virtualization. In one embodiment, the system may include a volume server, a first and a second host computer system, and a plurality of physical block devices. The volume server may be configured to ag ...


8
Ronald S Karr, Kalaivani Arumugham, John A Colgrove, Poonam Dhavale: System and method for recoverable mirroring in a storage environment employing asymmetric distributed block virtualization. Symantec Operating Corporation, Meyertons Hood Kivlin Kowert & Goetzel P C, B Noël Kivlin, Anthony M Petro, March 4, 2008: US07340640 (28 worldwide citation)

Systems and methods for performing recoverable mirroring in a storage environment employing asymmetrically distributed block virtualization. In one embodiment, the system may include a volume server, a first and a second host computer system, and a plurality of physical block devices. The volume ser ...


9
Gregory F Grohoski, Christopher H Olson, Leonard D Rarick: Processor including general-purpose and cryptographic functionality in which cryptographic operations are visible to user-specified software. Sun Microsystems, Robert C Kowert, Anthony M Petro, Meyertons Hood Kivlin Kowert & Goetzel P C, November 17, 2009: US07620821 (24 worldwide citation)

A processor including general-purpose and cryptographic functionality, in which cryptographic operations are visible to user-specified software. According to one embodiment, a processor may include instruction execution logic configured to execute instructions specified by a user of the processor, w ...


10
Christopher H Olson, Gregory F Grohoski: Apparatus and method for implementing a block cipher algorithm. Sun Microsystems, Robert C Kowert, Anthony M Petro, Meyertons Hood Kivlin Kowert & Goetzel P C, August 4, 2009: US07570760 (23 worldwide citation)

An apparatus and method for implementing a block cipher algorithm. In one embodiment, a cryptographic unit configured to implement a block cipher algorithm may include state storage configured to store cipher state, where the cipher state includes a plurality of rows and a plurality of columns. The ...