1
Tyler A Lowrey, Randal W Chance, David A Cathey: Method for reducing, by a factor or 2.sup.-N, the minimum masking pitch of a photolithographic process. Micron Technology, Angus C Fox III, July 12, 1994: US05328810 (516 worldwide citation)

The process starts with a primary mask, which may be characterized as a pattern of parallel, photoresist strips having substantially vertical edges, each having a minimum feature width F, and being separated from neighboring strips by a minimum space width which is also approximately equal to F. Fro ...


2
Angus C Fox III, Warren M Farnworth: High-density electronic package comprising stacked sub-modules which are electrically interconnected by solder-filled vias. Micron Technology, Angus C Fox III, July 7, 1992: US05128831 (328 worldwide citation)

A high-density package containing identical multiple IC chips is disclosed. The package is assembled from submodules interleaved with frame-like spacers. Each submodule comprises a rectangular, wafer-like substrate. The substrate has a planar metalization pattern, comprising conductive traces, on it ...


3
Tyler A Lowrey, Randal W Chance, D Mark Durcan, Ruojia Lee, Charles H Dennison, Yauh Ching Liu, Pierre C Fazan, Fernando Gonzalez, Gordon A Haller: Process for fabricating a DRAM array having feature widths that transcend the resolution limit of available photolithography. Micron Technology, Angus C Fox III, Stanley N Protigal, May 7, 1991: US05013680 (286 worldwide citation)

A process for creating a DRAM array having feature widths that transcend the resolution limit of the employed photolithographic process using only five photomasking steps. The process involves the following steps: creation of a half-pitch hard-material mask that is used to etch a series of equidista ...


4
Brent D Gilgen, Tyler A Lowrey, Joseph J Karniewicz, Anthony M McQueen: Reduced-mask, split-polysilicon CMOS process, incorporating stacked-capacitor cells, for fabricating multi-megabit dynamic random access memories. Micron Technology, Angus C Fox III, July 28, 1992: US05134085 (232 worldwide citation)

This invention constitutes a 10-12 mask, split-polysilicon process for fabricating dynamic random access memories of the stacked capacitor type for the one-megabit generation and beyond. The process flow is characterized: reduced mask count due to the elimination of the N+ and p+ source-drain maskin ...


5
Warren M Farnworth: Double-die semiconductor package having a back-bonded die and a face-bonded die interconnected on a single leadframe. Micron Technology, Angus C Fox III, Stanley N Protigal, April 30, 1991: US05012323 (209 worldwide citation)

A semiconductor package incorporating a pair of semiconductor dice on a single leadframe of the type having a wire-bonding region at each end of a die-attachment region which has both an upper and lower surface. The first of said pair of dice is back bonded to the upper surface of said die-attachmen ...


6
Tim J Corbett, Alan G Wood: Discrete die burn-in for nonpackaged die. Micron Technology, Stanley N Protigal, Angus C Fox III, Jon P Busack, February 6, 1990: US04899107 (195 worldwide citation)

A reusable burn-in/test fixture for discrete TAB die consists of two halves. The first half of the test fixture is a die cavity plate for receiving semiconductor dice, and contains cavities in which die are inserted. The second half establishes electrical contact with the dice and with a burn-in ove ...


7
Geary L Leger, Karl H Mauritz, Chris A Unrein, Thomas W Voshell: Method and apparatus for storing digital data in off-specification dynamic random access memory devices. Micron Technology, Angus C Fox III, December 31, 1991: US05077737 (183 worldwide citation)

A fault-tolerant memory system or "FTMS" is intended for use as mass data storage for a host computer system. The FTMS incorporates a dedicated microprocessor-controlled computer system which serializes blocks of user data as they are received from the host system, deserializes those blocks when the ...


8
Mark E Tuttle: Polishing pad with uniform abrasion. Micron Technology, Stanley N Protigal, Angus C Fox III, June 4, 1991: US05020283 (161 worldwide citation)

A polishing pad for semiconductor wafers, having a face shaped by a series of voids. The voids are substantially the same size, but the frequency of the voids increases with increasing radial distance to provide a constant, or nearly constant, surface contact rate to a workpiece such as a semiconduc ...


9
Fernando Gonzales: Dynamic random access memory array having a cross-point layout, tungsten digit lines buried in the substrate, and vertical access transistors. Micron Technology, Angus C Fox III, Holland & Hart, March 5, 1996: US05497017 (160 worldwide citation)

This invention is a DRAM array having stacked-capacitor cells of potentially 4F.sup.2 surface area (F being the photolithographic minimum feature width), and a 5-mask process for fabricating such an array. The array has a cross-point cell layout (i.e., a memory cell is located at each intersection o ...


10
Ravi Iyer, Irina Vasilyeva: Method for depositing a tungsten layer on silicon. Micron Technology, Angus C Fox III, Fillmore Belliston & Israelsen, March 31, 1998: US05733816 (154 worldwide citation)

This invention is a process for depositing tungsten metal on a silicon surface with the deposited layer having improved uniformity of thickness over prior art deposition techniques. The process involves the steps of removing any native silicon dioxide present on the silicon surface, forming a barrie ...



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