1
David D Stubbs: Signal viewing instrumentation control system. Tektronix, Alexander C Johnson Jr, Robert S Hulse, March 14, 1989: US04812996 (146 worldwide citation)

A signal viewing instrumentation control system includes a programmable test instrument, a computer having an input keyboard and/or mouse, a CRT display and a communications interface for the computer to communicate with the test instrument. The test instrument can be a digitizer, a spectrum analyze ...


2
Dale A Jordan, Lynne A Fitzsimmons, William A Greenseth, Gregory L Hoffman, David D Stubbs: Block diagram editor system and method for controlling electronic instruments. Tektronix, Alexander C Johnson Jr, Robert S Hulse, September 19, 1989: US04868785 (128 worldwide citation)

A block diagram editor system and method is implemented in a computer workstation that includes a Cathode Ray Tube (CRT) and a mouse, graphics and windowing software, and an external communications interface for test instruments. The computer is programmed for constructing, interconnecting and displ ...


3
Douglas J Doornink, David L Knierim, John C Dalrymple: Local display bus architecture and communications method for Raster display. Tektronix, Francis I Gray, Alexander C Johnson Jr, February 9, 1993: US05185599 (75 worldwide citation)

A high performance graphics display system for use as an engineering workstation includes a compact method of generating vectors and transmitting addresses for same from a picture processor to frame buffer control circuitry for writing or reading pixel values along the vector in the frame buffer. Th ...


4
Jack Sachitano, Hee K Park, Paul K Boyer, Gregory C Eiden, Tadanori Yamaguchi: High speed double polycide bipolar/CMOS integrated circuit process. Tektronix, John D Winkelman, Alexander C Johnson Jr, February 20, 1990: US04902640 (54 worldwide citation)

A mixed bipolar-CMOS self-aligned process and integrated circuit provide a high performance NPN bipolar transistor in parallel to fabrication of a PMOSFET and an NMOSFET. Gate and base contacts are formed in a first polysilicon layer. The base contacts are implanted with P+ ion concentrations for di ...


5
William A Vetanen, Kimberly R Gleason, Irene G Beers: Self-aligned recessed gate process. Triquint Semiconductors, William S Lovell, Alexander C Johnson Jr, John D Winkelman, April 7, 1987: US04656076 (54 worldwide citation)

An integrated circuit gate process and structure are disclosed which provide a self-aligned, recessed gate enhancement-mode GaAsFET. The process includes making self-aligned implants prior to gate metallization, with an intermediate step of applying patches of plasma- and chemical-etch resistant die ...


6
Jayasimha S Prasad, Song W Park, William A Vetanen, Irene G Beers, Curtis M Haynes: Implant-free heterojunction bioplar transistor integrated circuit process. Tektronix, Alexander C Johnson Jr, Francis I Gray, December 7, 1993: US05268315 (44 worldwide citation)

The disclosed HBT IC process can fabricate npn heterojunction bipolar transistors, Schottky diodes, MIM capacitors, spiral inductors, and NiCr resistors. Two levels of interconnect metal are available. The first level metal is a conventional dielectric-insulated metal conductor. The second level met ...


7
Stanley Perino, Thomas E Davenport: Method of manufacturing ferroelectric bismuth layered oxides. Ramtron International Corporation, Peter J Meza, Alexander C Johnson Jr, June 20, 1995: US05426075 (37 worldwide citation)

A semiconductor manufacturing method is directed to forming a ferroelectric film, and in particular a ferroelectric film of the bismuth layer structure type, that has a significant component of reversible polarization perpendicular to the plane of the electrodes. The manufacturing method is conducte ...


8
Stephen R Early, Daniel Grogan: Rhodium capped gold IC metallization. Tektronix, John Winkelman, Alexander C Johnson Jr, August 18, 1987: US04687552 (32 worldwide citation)

A process for two layer gold integrated circuit metallization is disclosed. The process includes electrodeposition of a first metal layer, preferably of gold, atop a barrier layer, followed by electrodeposition of a second metal layer or cap, atop the gold to form a first metallization layer. The ca ...


9
Stanley Perino, Thomas E Davenport: Method of manufacturing ferroelectric bismuth layered oxides. Ramtron International Corporation, Peter J Meza, Alexander C Johnson Jr, May 21, 1996: US05519566 (32 worldwide citation)

A semiconductor manufacturing method is directed to forming a ferroelectric film, and in particular a ferroelectric film of the bismuth layer structure type, that has a significant component of reversible polarization perpendicular to the plane of the electrodes. The manufacturing method is conducte ...


10
Darrell B Irvin: Method of low cost self-test in a video display system system. Tektronix, Alexander C Johnson Jr, Robert S Hulse, September 20, 1988: US04772948 (25 worldwide citation)

In a color graphics display system, video analog self-test hardware for testing the system elements between the frame buffer and the CRT display monitor is provided including a bi-directional data bus between the graphics processor and the color map, an analog comparator, an integrator, and an analo ...