1
Min Won Gi, Baird Robert W, Zuo Jiang Kai, Lee Gordon P: Antifuse element and electrically redundant antifuse array for controlled rupture location. Freescale Semiconductor, Min Won Gi, Baird Robert W, Zuo Jiang Kai, Lee Gordon P, KING Robert L, October 12, 2006: WO/2006/107384 (2 worldwide citation)

An antifuse element (102) having end corners (120, 122) of a gate electrode (104) positioned directly above an active area (106) or bottom electrode. The minimum programming voltage between the gate electrode (104) and the active area (106) creates a current path through an insulating layer (110) po ...


2
Chung Young Sir, Baird Robert W, Durlam Mark A, Grynkewich Gregory W, Salter Eric J, Zuo Jiang Kai: Magnetic tunnel junction current sensors. Freescale Semiconductor, Chung Young Sir, Baird Robert W, Durlam Mark A, Grynkewich Gregory W, Salter Eric J, Zuo Jiang Kai, KING Robert L, May 10, 2007: WO/2007/053340

An integrated circuit device (600) is provided which includes an active circuit component (604, 804) and a current sensor (602, 802). The active circuit component (604, 804) may be coupled between a first conductive layer (206) and a second conductive layer (210), and is configured to produce a firs ...


3

4
Min Won Gi, Macary Veronique C, Zuo Jiang Kai: Microelectronic assembly with improved isolation voltage performance and a method for forming the same. Freescale Semiconductor, Min Won Gi, Macary Veronique C, Zuo Jiang Kai, KING Robert L, September 4, 2008: WO/2008/106284

A method for forming a microelectronic assembly and a microelectronic assembly are provided. First and second semiconductor devices (72) are formed over a substrate (20) having a first dopant type at a first concentration. First and second buried regions (28) having a second dopant type are formed r ...


5
Min Won Gi, Zuo Jiang Kai: Electronic device and method for operating a memory circuit. Freescale Semiconductor, Min Won Gi, Zuo Jiang Kai, KING Robert L, November 20, 2008: WO/2008/140904

An electronic device is disclosed having a dielectric layer (12) formed at a semiconductor substrate (10). A polysilicon fuse structure (14) having a first length is formed overlying the dielectric layer (12). First and second portions (141, 142) of the polysilicon fuse structure are silicided, wher ...


6
Yang Hongning, Zuo Jiang Kai: Dual gate lateral diffused mos transistor. Freescale Semiconductor, Yang Hongning, Zuo Jiang Kai, KING Robert Let al, October 8, 2009: WO/2009/123787

A disclosed power transistor (150), suitable for use in a switch mode converter (200, 300) that is operable with a switching frequency exceeding, for example, 5 MHz or more, includes a gate dielectric layer (110) overlying an upper surface of a semiconductor substrate (101) and first and second gate ...