1
Yamaguchi Yoshihiro, Sano Yoshiyuki: Power converting device with inverter circuitry for driving multiple-phase variable-speed motor.. Tokyo Shibaura Electric Co, Toshiba Micro Electronics, January 7, 1993: EP0521709-A2 (26 worldwide citation)

A power conversion device (10) of the inverter type for three-phase DC motor (12) includes three parallel pairs of output transistors (Q1 to Q6) between a power supply voltage (20) and the ground potential (22). These pairs provide three upper-stage transistors (Q1, Q3, Q5) and three lower-stage tra ...


2
Arakawa Takashi, Motegi Hiroyuki: Power source apparatus for driving liquid crystal display.. Tokyo Shibaura Electric Co, Toshiba Micro Electronics, April 8, 1992: EP0479304-A2 (22 worldwide citation)

A plurality of resistors (11 - 17) serially connected with each other between a maximum voltage level "V" and a minimum voltage level "0" are provided to generate voltage-divided intermediate voltage levels "V2H", "V1H", "V3L", "V2L", the voltages having the voltage-divided intermediate voltage leve ...


3
Arakawa Takashi, Sakaki Kinya: Display driving/controlling integrated circuit and display system. Tokyo Shibaura Electric Co, Toshiba Micro Electronics, November 11, 1992: GB2255668-A (19 worldwide citation)

A display driving/controlling integrated circuit includes a display memory (11) for storing data to be supplied to a display unit, a bus line (BUS0 to BUS7) of n-bit configuration for transmitting display data (DB0 to DB7) to be stored in the display memory with n bits set as one unit, and a data ar ...


4
Naruke Kiyomi, Suzuki Tomoko, Yamada Seiji, Obi Etsushi, Oshikiri Masamitsu Int Prop Di: Nonvolatile semiconductor memory device and its operating method.. Tokyo Shibaura Electric Co, Toshiba Micro Electronics, December 30, 1992: EP0520505-A2 (19 worldwide citation)

In this invention, charges are extracted from the charge storage portion (111) by means of F-N tunnel current, and then avalanche hot carriers (-, +) are injected into the storage portion (111).


5
Asano Masamichi, Iwahashi Hiroshi Shikimidai, Kirisawa Ryohei Isogo Dai Ry, Nakayama Ryozo Isogo Maruyamad, Inoue Satoshi Sano So F, Shirota Riichiro Toshiba Furuk, Endo Tetsuro Kikuna, Masuoka Fujio Takeyama: Nonvolatile semiconductor memory and method of producing the same.. Tokyo Shibaura Electric Co, Toshiba Micro Electronics, April 3, 1991: EP0419663-A1 (18 worldwide citation)

A nonvolatile semiconductor memory having nonvolatile memory cells that electrically erase and write data. Each memory cell has a floating gate and a control gate formed on the channel region on the surface of a semiconductor substrate. The floating gate covers only part of the channel region. In th ...


6
Tanaka Yutaka C O Intellectual, Haraguchi Masanori C O Intelle: Semiconductor memory device.. Tokyo Shibaura Electric Co, Toshiba Micro Electronics, August 22, 1990: EP0383080-A2 (14 worldwide citation)

In a semiconductor memory device having a sense amplifier (22) for amplifying a potential difference between a pair of regular bit lines (11, 11), the memory device further comprises a dummy bit line (41) having a load capacitance equal to that of each of the pair of regular bit lines, a dummy memor ...


7
Ikawa Tatsuo Mason Ishizuka, Ohshima Shigeo: Semiconductor memory device.. Tokyo Shibaura Electric Co, Toshiba Micro Electronics, July 29, 1992: EP0496391-A2 (14 worldwide citation)

A semiconductor memory device having: a RAM port for randomly accessing a memory cell (1) array having memory cells disposed in matrix; a SAM port for serially accessing data of one row of the memory cell array (1); a mode switching unit (203) for switching the operation mode of the SAM port between ...


8
Koyanagi Masaru, Muraoka Kazuyoshi, Yamada Minoru: Lead on chip structure for semiconductor device.. Tokyo Shibaura Electric Co, Toshiba Micro Electronics, December 29, 1993: EP0576021-A1 (13 worldwide citation)

In the semiconductor device according to the present invention, bonding pads (15a, 15b) are arranged on the periphery of the semiconductor chip (10) and power supply inner leads (111-118) are disposed inwardly of signal inner leads (12a, 12b). Since bonding wires (20, 22) for connecting the signal l ...


9
Noda Junichi, Tohyama Daisuke: Nonvolatile semiconductor memory device and its manufacturing method.. Tokyo Shibaura Electric Co, Toshiba Micro Electronics, May 31, 1995: EP0655785-A2 (12 worldwide citation)

A select MOS transistor (ST) and a data storage MOS transistor (MT) are formed in an element region. The transistor (MT) has floating-gate electrodes (71A, 71B). The floating-gate electrodes (71A, 71B) are spaced apart above the element region and connected to each other above a field region. Only a ...


10
Tanaka Yasunori C O Intellectu, Ogawa Kyohsuke C O Intellectua: Semiconductor integrated circuit device having pads at periphery of semiconductor chip.. Tokyo Shibaura Electric Co, Toshiba Micro Electronics, June 12, 1991: EP0431490-A1 (11 worldwide citation)

For increasing the number of pads to be connected to external terminals such as leads of a lead frame without increasing an area of a semiconductor IC chip (10) , pads (11a, 11b) are disposed at a periphery of the chip in such a manner that they are arranged in at least first and second rows, to whi ...