1
James Doherty
Donald B Doherty, Henry Chu, James D Huffman: Blocked stepped address voltage for micromechanical devices. Texas Instruments Incorporated, Charles A Brill, Wade James Brady III, Frederick J Telecky Jr, November 12, 2002: US06480177 (205 worldwide citation)

A method of addressing an array of spatial light modulator elements. The method divides the array into blocks of elements, provides reset lines (MRST) to each of the block of elements, separate from the other blocks of elements, as well as address voltage supplies (VCC


2
Eb Eshun
Ebenezer Eshun: Structure and method for integrating front end SiCr resistors in HiK metal gate technologies. Texas Instruments Incorporated, Jacqueline J Garner, Wade J Brady III, Frederick J Telecky Jr, March 25, 2014: US08680618 (4 worldwide citation)

An integrated circuit having a replacement HiK metal gate transistor and a front end SiCr resistor. The SiCr resistor replaces the conventional polysilicon resistor in front end processing and is integrated into the contact module. The first level of metal interconnect is located above the SiCr resi ...


3
Eb Eshun
Shashank S Ekbote, Kwan Yong Lim, Ebenezer Eshun, Youn Sung Choi: Silicide formation due to improved SiGe faceting. TEXAS INSTRUMENTS INCORPORATED, Jacqueline J Garner, Frank D Cimino, July 28, 2015: US09093298 (2 worldwide citation)

An integrated circuit includes a PMOS gate structure and a gate structure on adjacent field oxide. An epitaxy hard mask is formed over the gate structure on the field oxide so that the epitaxy hard mask overlaps the semiconductor material in PMOS source/drain region. SiGe semiconductor material is e ...


4
Eb Eshun
Shashank S Ekbote, Kwan Yong Lim, Ebenezer Eshun, Youn Sung Choi: Silicide formation due to improved SiGe faceting. TEXAS INSTRUMENTS INCORPORATED, Jacqueline J Garner, Frank D Cimino, December 1, 2015: US09202883 (1 worldwide citation)

An integrated circuit includes a PMOS gate structure and a gate structure on adjacent field oxide. An epitaxy hard mask is formed over the gate structure on the field oxide so that the epitaxy hard mask overlaps the semiconductor material in PMOS source/drain region. SiGe semiconductor material is e ...


5
Eb Eshun
Shashank S Ekbote, Kwan Yong Lim, Ebenezer Eshun, Youn Sung Choi: Silicide formation due to improved SiGe faceting. TEXAS INSTRUMENTS INCORPORATED, Jacqueline J Garner, Frank D Cimino, August 2, 2016: US09406769

An integrated circuit includes a PMOS gate structure and a gate structure on adjacent field oxide. An epitaxy hard mask is formed over the gate structure on the field oxide so that the epitaxy hard mask overlaps the semiconductor material in PMOS source/drain region. SiGe semiconductor material is e ...


6
Eb Eshun
Himadri Sekhar Pal, Ebenezer Eshun, Shashank S Ekbote: Integrated circuit and method of forming the integrated circuit with improved logic transistor performance and SRAM transistor yield. TEXAS INSTRUMENTS INCORPORATED, Jacqueline J Garner, Frank D Cimino, December 29, 2015: US09224653

In an integrated circuit that includes an NMOS logic transistor, an NMOS SRAM transistor, and a resistor, the gate of the SRAM transistor is doped at the same time that the resistor is doped, thereby allowing the gate of the logic transistor to be separately doped without requiring any additional ma ...


7
Eb Eshun
Ebenezer Eshun: Method to enable higher carbon co-implants to improve device mismatch without degrading leakage. TEXAS INSTRUMENTS INCORPORATED, Jacqueline J Garner, Frank D Cimino, August 30, 2016: US09431533

An integrated circuit containing an NMOS transistor with a boron-doped halo is formed by co-implanting carbon in at least three angled doses with the boron halo implants. The carbon is co-implanted at tilt angles within 5 degrees of the boron halo implant tilt angle. An implant energy of at least on ...


8
Eb Eshun
Himadri Sekhar Pal, Ebenezer Eshun, Shashank S Ekbote: Integrated circuit and method of forming the integrated circuit with improved logic transistor performance and SRAM transistor yield. TEXAS INSTRUMENTS INCORPORATED, Jacqueline J Garner, Frank Cimino, July 7, 2015: US09076670

In an integrated circuit that includes an NMOS logic transistor, an NMOS SRAM transistor, and a resistor, the gate of the SRAM transistor is doped at the same time that the resistor is doped, thereby allowing the gate of the logic transistor to be separately doped without requiring any additional ma ...


9
Virupax M Nerlikar: Information management and security system. Texas Instruments Incorporated, Ira S Matsil, James C Kesterson, Richard L Donaldson, May 13, 1997: US05629981 (832 worldwide citation)

A closed loop, (networked) information management and security system which provides a secure, end-to-end fully automated solution for controlling access, transmission, manipulation, and auditability of high value information comprising an RFID transponder badge 302 and an RF reader transceiver 315 ...


10
E Earle Thompson, Gerald G Birdwell: Communication system and methods for enhanced information transfer. Texas Instruments Incorporated, Thomas G Eschweiller, James C Kesterson, Richard L Donaldson, August 2, 1994: US05335276 (709 worldwide citation)

A communication system (20) is provided with multiple purpose personal communication devices (50 and 150). Each communication device (50 and 150) includes a touch-sensitive visual display (60 and 160) to communicate text and graphic information to and from the user and for operating the communicatio ...



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