1
Richard K Williams, Richard A Blanchard: Complementary, isolated DMOS IC technology. Siliconix Incorporated, Skjerven Morrill MacPherson Franklin & Friel, October 20, 1992: US05156989 (286 worldwide citation)

A process sequence that produces a plurality of pretransistor structures from which a variety of high voltage, isolated integrated circuits and low voltage integrated circuits are easily fabricated.


2
Constantin Bulucea, Rebecca Rossen: Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry. Siliconix Incorporated, Skjerven Morrill MacPherson Franklin & Friel, December 10, 1991: US05072266 (236 worldwide citation)

Power MOSFET apparatus, and method for its production, that suppresses voltage breakdown near the gate, using a polygon-shaped trench in which the gate is positioned in order to suppress oxide dielectric breakdown, using a shaped deep body junction that partly lies below the trench bottom to force v ...


3
Richard K Williams, Wayne Grabowski, Mohamed Darwish, Jacek Korec: Trench-gated MOSFET with bidirectional voltage clamping. Siliconix incorporated, David E Steuber, Carmen C Cook, Skjerven Morrill MacPherson Franklin & Friel, April 11, 2000: US06049108 (228 worldwide citation)

The gate of a MOSFET is located in a lattice of trenches which define a plurality of cells. Most of the cells contain a MOSFET, but a selected number of the cells at predetermined locations in the lattice contain either a PN diode or a Schottky diode. The PN and Schottky diodes are connected in para ...


4
Richard K Williams, Mohammad Kasem: Vertical power mosfet having thick metal layer to reduce distributed resistance. Siliconix Incorporated, David E Steuber, Skjerven Morrill MacPherson Franklin and Friel, September 9, 1997: US05665996 (220 worldwide citation)

The on-resistance of a vertical power transistor is substantially reduced by forming a thick metal layer on top of the relatively thin metal layer that is conventionally used to make contact with the individual transistor cells in the device. The thick metal layer is preferably plated electrolessly ...


5
Richard A Blanchard: Method for increasing the performance of trenched devices and the resulting structure. Siliconix Incorporated, Steven F Caserza, January 9, 1990: US04893160 (220 worldwide citation)

A trenched device, such as a DMOS transistor, provides for higher breakdown voltages than possible using trenched devices of the prior art. The trench extends only into the epitaxial layer, thereby minimizing breakdown problems associated with prior art trench devices in which the trench extends int ...


6
Richard K Williams, Mohamed Darwish, Wayne Grabowski, Michael E Cornell: Low resistance power MOSFET or other device containing silicon-germanium layer. Siliconix incorporated, David E Steuber, Skjerven Morrill MacPherson, May 29, 2001: US06239463 (177 worldwide citation)

A power MOSFET or other semiconductor device contains a layer of silicon combined with germanium to reduce the on-resistance of the device. The proportion of germanium in the layer is typically in the range of 1-40%. To achieve desired characteristics the concentration of germanium in the Si-Ge laye ...


7
Richard A Blanchard: Grooved DMOS process with varying gate dielectric thickness. Siliconix Incorporated, Skjerven Morrill MacPherson Franklin & Friel, April 3, 1990: US04914058 (175 worldwide citation)

Disclosed is a process for making a DMOS, including lining a groove with a dielectric material to form an inner groove having sidewalls extending through the bottom of the first groove, and lining the inner groove with a dielectric material to obtain increased thickness of the gate dielectric on the ...


8
Fwu Iuan Hshieh, Brian H Floyd, Mike F Chang, Danny Nim, Daniel Ng: High density trench DMOS transistor with trench bottom implant. Siliconix incorporated, Norman R Klivans, Skjerven Morrill MacPherson Franklin & Friel, July 27, 1999: US05929481 (142 worldwide citation)

A trenched DMOS transistor overcomes the problem of a parasitic JFET at the trench bottom (caused by deep body regions extending deeper than the trench) by providing a doped trench bottom implant region at the bottom of the trench and extending into the surrounding drift region. This trench bottom i ...


9
Hamza Yilmaz: Power metal-oxide-semiconductor field effect transistor. Siliconix Incorporated, Skjerven Morrill MacPherson Franklin & Friel, December 1, 1992: US05168331 (138 worldwide citation)

A metal-oxide-semiconductor field effect transistor constructed in a trench or groove configuration is provided with protection against voltage breakdown by the formation of a shield region adjacent to the insulating layer which borders the gate of the transistor. The shield region is either more li ...


10
Richard K Williams: Vertical power MOSFET having reduced sensitivity to variations in thickness of epitaxial layer. Siliconix incorporated, David E Steuber, Skjerven Morrill MacPherson Franklin & Friel, September 29, 1998: US05814858 (136 worldwide citation)

A vertical power MOSFET, which could be a trench-gated or planar double-diffused device, includes an N+ substrate and an overlying N-epitaxial layer. An N-type buried layer is formed in the epitaxial layer and overlaps the substrate, the buried layer having a dopant concentration which is greater th ...