1
Tue Nguyen, Sheng Teng Hsu: Low resistance contact between integrated circuit metal levels and method for same. Sharp Microelectronics Technology, Sharp Kabushiki Kaisha, Gerald W Maliszewski, David C Ripma, May 18, 1999: US05904565 (161 worldwide citation)

A method of forming a direct, copper-to-copper, connection between levels in an IC is disclosed. A via interconnection is formed by isotropically depositing a barrier material in a via through an insulator to a lower copper level, and then anisotropically etching the via to remove the barrier materi ...


2
Tatsuo Nakato: Method for forming silicon-germanium/Si/silicon dioxide heterostructure using germanium implant. Sharp Microelectronics Technology, Sharp Kabushiki Kaisha, Fliesler Dubb Meyer & Lovejoy, August 11, 1998: US05792679 (146 worldwide citation)

A method for fabricating a GeSi/Si/SiO.sub.2 heterostructure comprises the steps of: (a) providing a monocrystalline Si substrate; (b) defining a GeSi region within the Si substrate while leaving a Si cap overlying the GeSi region, the Si cap being an integral part of the monocrystalline substrate; ...


3
Prem L Sood: Apparatus and method for locating mobile and portable radio terminals in a radio network. Sharp Microelectronics Technology, Martin C Fliesler, March 8, 1994: US05293645 (127 worldwide citation)

A system for locating a movable radio terminal within a cellular telephone network, or other radio network, which includes a plurality of base stations that transmit synchronized timing reference signals. A receiver in the network receives transmissions from the radio terminals to be located that in ...


4
Sheng Teng Hsu: Method for manufacturing a CMOS self-aligned strapped interconnection. Sharp Microelectronics Technology, Sharp Kabushiki Kaisha, Gerald Maliszewski, David C Ripma, June 22, 1999: US05915199 (95 worldwide citation)

An CMOS interconnection method that permits small source/drain surface areas has been provided. The interconnection is applicable to both strap and via type connections. The surface areas of the small source/drain regions are extended into neighboring field oxide regions by forming a silicide film f ...


5
Peter John Sevcik, Jeffrey Scott Vigil: System and method for conserving battery power in a mobile station searching to select a serving cell. Sharp Microelectronics Technology, Sharp Kabushiki Kaisha, Gerald W Maliszewski, David C Ripma, August 11, 1998: US05794146 (73 worldwide citation)

A method is providing for a mobile station to vary the interval between scans by a mobile station for the beacon signals of cells in a communications system, in order to save battery power, when the mobile station is searching to select a serving cell. The method increases the interval between scans ...


6
Steven B Sidman: Multiple register bank system for concurrent I/O operation in a CPU datapath. Sharp Microelectronics Technology, Sharp Kabushiki Kaisha, David C Ripma, Gerald Maliszewski, October 21, 1997: US05680641 (65 worldwide citation)

A system and method is provided for use in register-based CPUs for processing data in the CPU register bank while concurrently loading and unloading data into additional register banks. The additional register banks are then sequentially connected to the CPU datapath for data processing. Interconnec ...


7
Jin Yang: Receiving method and apparatus for use in a spread-spectrum communication system. Sharp Microelectronics Technology, Sharp Kabushiki Kaisha, Kolisch Hartwell Dickinson McCormack & Heuser, September 23, 1997: US05671221 (64 worldwide citation)

The present invention involves a receiving method and apparatus for use in a communication system wherein a spread-spectrum signal containing information bits is transmitted within an environment tending to produce multipath fading. The receiving apparatus includes a channel estimator which estimate ...


8
Sheng T Hsu: Nitridation of SIMOX buried oxide. Sharp Microelectronics Technology, Sharp Kabushiki Kaisha, David C Ripma, November 21, 1995: US05468657 (51 worldwide citation)

A method is provided for improving the electrical isolation between surface regions and underlying support regions in SIMOX buried oxide wafers. The method implants nitrogen ions into a wafer to approximately the same depth as oxygen ions are implanted during SIMOX processing. A subsequent heating s ...


9
Tue Nguyen, Chien Hsiung Peng, Bruce Dale Ulrich: Hard mask method for transferring a multi-level photoresist pattern. Sharp Microelectronics Technology, Sharp Kabushiki Kaisha, Gerald Maliszewski, David C Ripma, October 13, 1998: US05821169 (49 worldwide citation)

A method is provided for forming intermediate levels in an integrated circuit dielectric during a damascene process using a hard mask layer to transfer the pattern of a photoresist mask having at least one intermediate thickness. The dielectric is covered with a hard mask layer, and the hard mask la ...


10
Rohit Bhatia, Masaru Furuta: Apparatus and method for preventing I/O bandwidth limitations in fast fourier transform processors. Sharp Microelectronics Technology, Sharp Kabushiki Kaisha, kenneth M Kaslow, May 17, 1994: US05313413 (48 worldwide citation)

A Quasi Radix-16 Butterfly comprises an radix-4 butterfly processor and on-board memory with external memory addressing changes from a conventional radix-4 butterfly processor. On-chip cache memory is included to store data outputs of the radix-4 butterfly processor for application as data inputs to ...