1
Randy C Steele: Logic block for programmable logic devices. SGS Thomson Microelectronics, Kenneth C Hill, Lisa K Jorgenson, Richard K Robinson, July 7, 1992: US05128559 (192 worldwide citation)

A standard logic block, or macrocell, is provided for use on programmable logic devices. The macrocell uses RAM to perform logic functions, and further includes circuitry which allows writing of data to the RAM during use. Each logic block can be configured at programming time to be either a user RA ...


2
Pierangelo Magni: Plastic package for electronic devices. SGS Thomson Microelectronics S r l, James H Morris, Theodore E Galanthay, Wolf Greenfield & Sacks P C, August 28, 2001: US06281566 (163 worldwide citation)

A semiconductor electronic device comprises a chip of a semiconductor material, a set of metal conductors adjacent to the plate, a set of wire leads joining selected points on the chip to the metal conductors, and a supporting metal plate formed of three portions having a total surface area which is ...


3
Robert H Bond, Michael J Hundt: Ball-grid-array integrated circuit package with solder-connected thermal conductor. SGS Thomson Microelectronics, Theodore E Galanthay, Lisa K Jorgenson, June 24, 1997: US05642261 (149 worldwide citation)

An integrated circuit package with a path of high thermal conductivity is disclosed. The package is formed into a substrate, such as a printed circuit board or a ceramic substrate, through which an opening has been formed to receive a thermally conductive slug, formed of a material such as copper. A ...


4
Catherine L Barnaby, Richard J Gammack, Anthony I Stansfield: Cam with additional row cells connected to match line. SGS Thomson Microelectronics, Felsman Bradley Gunter & Dillon, February 13, 1996: US05491703 (142 worldwide citation)

A method of accessing a content addressable memory having a plurality of RAM cells connected in an array of rows and columns, each row having a plurality of cells for storing a data word, at least one additional cell for storing a checking bit and a match line for providing a signal to indicate when ...


5
Anthony I Stansfield: Programmable logic device with memory that can store routing data of logic data. SGS Thomson Microelectronics, Felsman Bradley Gunter & Dillon, December 5, 1995: US05473267 (141 worldwide citation)

A programmable logic device is disclosed which can be used either as a look-up table logic device or as a logic function generator. This enables combinations to be provided such as the combination of a look-up table with a fixed gate field programmable gate array.


6
Christian G Kassapian: Voltage booster circuit of the charge-pump type with bootstrapped oscillator. SGS Thomson Microelectronics, David M Driscoll, James H Morris, Brett N Dorny, December 31, 1996: US05589793 (133 worldwide citation)

The invention relates to charge-pump circuits used for the generation, in an integrated circuit, of an internal supply voltage Vpp which is considerably greater than the external supply voltage Vcc. In a charge pump configuration with capacitors and transistors, certain transistors must be driven by ...


7
Artiere Alain: Multiple transistor dynamic random access memory array architecture with simultaneous refresh of multiple memory cells during a read operation. Sgs Thomson Microelectronics, November 18, 1998: EP0878804-A2 (121 worldwide citation)

A four transistor dynamic memory cell architecture and refresh technique which allows for cell refresh to occur during a read operation. The access and memory transistors of the individual memory cells are fabricated with a relative width-to-length ratio such that it is sufficient to merely activate ...


8
Randy C Steele, Safoin A Raad: Programmable summing functions for programmable logic devices. SGS Thomson Microelectronics, Richard K Robinson, Kenneth C Hill, March 27, 1990: US04912345 (116 worldwide citation)

A programmable logic device includes a programmable logic array and an output logic macrocell. The output logic macrocell includes a user configurable summing function that has a first logic gate connected to receive a first plurality of product terms, a second logic gate connected to receive a seco ...


9
Alexander Kalnitsky: Volatile memory cell with interface charge traps. SGS Thomson Microelectronics, David M Driscoll, James H Morris, March 4, 1997: US05608250 (112 worldwide citation)

A semiconductor device is described, incorporating electron traps at the interface between a semiconductor substrate and a gate dielectric layer of an insulated gate field effect transistor, such device being capable of retaining charge in the electron traps for a certain time, allowing volatile mem ...


10
Germano Nicollini: Linearly regulated voltage multiplier. SGS Thomson Microelectronics S r l, David V Carlson, Robert E Seed and Berry Mates, May 19, 1998: US05754417 (111 worldwide citation)

A regulating circuit for the output voltage of a voltage booster, of the type which comprises a first charge transfer capacitor adapted to draw electric charges from the supply terminal and transfer them to the output terminal, through electronic switches controlled by non-overlapped complementary p ...