1
Michael S Smith: System, method, and computer program product for improving memory systems. P4TENTS1, Patrick E Caldwell Esq, The Caldwell Firm, August 30, 2016: US09432298 (130 worldwide citation)

A system, method, and computer program product are provided for a memory system. The system includes a first semiconductor platform including at least one first circuit, and at least one additional semiconductor platform stacked with the first semiconductor platform and including at least one additi ...


2
Michael S Smith: Multiple class memory systems. P4tents1, Patrick E Caldwell Esq, The Caldwell Firm, January 6, 2015: US08930647 (57 worldwide citation)

An apparatus is provided comprising a physical memory sub-system including a first memory of a first memory class and a second memory of a second memory class, the second memory being communicatively coupled to the first memory. The apparatus is configured such that the first memory and the second m ...


3
Michael S Smith: User interface system, method, and computer program product. P4TENTS1, Patrick E Caldwell Esq, The Caldwell Firm, August 16, 2016: US09417754 (48 worldwide citation)

A system, method, and computer program product are provided for a touch or pressure signal-based interface. In operation, a touch or pressure signal is received in association with a touch interface of a device. To this end, a user experience is altered utilizing the signal. A system, method, and co ...


4
Michael S Smith: Computer program product for fetching from a first physical memory between an execution of a plurality of threads associated with a second physical memory. P4TENTS1, Patrick E Caldwell Esq, The Caldwell Firm, October 13, 2015: US09158546 (3 worldwide citation)

A computer program product, apparatus and associated method/processing unit are provided for utilizing a physical memory system including a first physical memory of a first physical memory class, and a second physical memory of a second physical memory class communicatively coupled to the first phys ...


5
Michael S Smith: Fetching data between thread execution in a flash/DRAM/embedded DRAM-equipped system. P4TENTS1, Patrick E Caldwell Esq, The Caldwell Firm, November 3, 2015: US09176671 (3 worldwide citation)

An apparatus and associated method/processing unit are provided for utilizing a memory subsystem including NAND flash memory and dynamic random access memory. Further included is a first circuit for receiving DDR signals and converting the DDR signals to SATA signals. The first circuit includes embe ...


6
Michael S Smith: System, method and computer program product for multi-thread operation involving first memory of a first memory class and second memory of a second memory class. P4TENTS1, Patrick E Caldwell Esq, The Caldwell Firm, November 10, 2015: US09182914 (3 worldwide citation)

An apparatus, computer program product, and associated method/processing unit are provided for utilizing a memory subsystem including a first memory of a first memory class, and a second memory of a second memory class communicatively coupled to the first memory. In operation, data is fetched using ...


7
Michael S Smith: Fetching data between thread execution in a flash/DRAM/embedded DRAM-equipped system. P4TENTS1, Patrick E Caldwell Esq, The Cladwell Firm, November 17, 2015: US09189442 (2 worldwide citation)

An apparatus and associated method/processing unit are provided for utilizing a memory subsystem including NAND flash memory and dynamic random access memory. Further included is a first circuit for receiving DDR signals and converting the DDR signals to SATA signals. The first circuit includes embe ...


8
Michael S Smith: System, method and computer program product for fetching data between an execution of a plurality of threads. P4TENTS1, Patrick E Caldwell Esq, The Caldwell Firm, December 29, 2015: US09223507 (2 worldwide citation)

An apparatus, computer program product, and associated method/processing unit are provided for utilizing a memory subsystem including a first memory of a first memory class, and a second memory of a second memory class communicatively coupled to the first memory. In operation, data is fetched using ...


9
Michael S Smith: Flash/DRAM/embedded DRAM-equipped system and method. P4TENTS1, Patrick E Caldwell Esq, The Caldwell Firm, November 24, 2015: US09195395 (2 worldwide citation)

An apparatus, computer program product, and associated method/processing unit are provided for utilizing a memory subsystem including NAND flash memory and dynamic random access memory. Further included is a first circuit for receiving DDR signals and converting the DDR signals to SATA signals. The ...


10
Michael S Smith: Computer program product for controlling a flash/DRAM/embedded DRAM-equipped system. P4TENTS1, Patrick E Caldwell Esq, The Caldwell Firm, October 27, 2015: US09170744 (2 worldwide citation)

A computer program product, apparatus and associated method/processing unit are provided for utilizing a memory subsystem including NAND flash physical memory and DRAM physical memory. Further included is a first buffer for receiving DDR signals and converting the DDR signals to SATA signals. The fi ...