1
Norman B Threewitt: Memory with CAM and RAM partitions. Music Semiconductors, Linda Flewellen Gould, January 17, 1995: US05383146 (93 worldwide citation)

A method is described of programming a memory array on a single integrated circuit so that a portion of each data word is characterized as CAM, with the remaining portion of each data word functioning as RAM. The programmable memory array is partitioned into CAM and RAM subfields by disabling the co ...


2
David Feldmeier, Tyler Arnold: Partially ordered cams used in ternary hierarchical address searching/sorting. Music Semiconductors, Caesar Rivise Bernstein Cohen & Pokotilow, September 11, 2001: US06289414 (78 worldwide citation)

An apparatus and method that utilizes partial ordering of ternary hierarchical addresses and their associated masks entries in both binary and ternary content addressable memories (CAMs) for providing fast searches and while reducing address table size used in the processing of communication system ...


3
Raymond E Parry: Synchronous FIFO having an alterable buffer store. Music Semiconductors, William J Holland & Hart Kubida, April 11, 1995: US05406554 (69 worldwide citation)

A synchronous first-in, first-out ("FIFO") having an alterable buffer store includes a dual-ported, random access memory ("RAM") based memory device incorporating conventional "empty" and "full" flags while also providing an alternate mode of operation in which the inhibiting effects of the "empty" ...


4
Brian James M, Jackson Joseph N: Video viewing supervision system. Music Semiconductors, November 18, 1998: EP0878092-A1

A TV/video viewing supervision system that enables a supervisor, typically a parent controlling children's viewing, to selectably program the hours, programs and/or channels of television, VCR, cable TV, satellite TV and/or game viewing that are allowed and/or blocked from viewing by comparing the s ...


5
David Feldmeier, Tyler Arnold: Partially-ordered CAMs used in ternary hierarchical address searching/sorting. Music Semiconductors, Caesar Rivise Bernstein Cohen & Pokotilow, March 14, 2002: US20020032681-A1

An apparatus and method that utilizes partial ordering of ternary hierarchical addresses and their associated masks entries in both binary and ternary content addressable memories (CAMs) for providing fast searches and while reducing address table size used in the processing of communication system ...


6
Brian James M, Jackson Joseph N: Video viewing supervision system. Music Semiconductors Corporation, BLAKELY Roger W Jr, July 11, 1996: WO/1996/021319

A TV/video viewing supervision system that enables a supervisor, typically a parent controlling children's viewing, to selectably preprogram the hours, programs and/or channels of television (20), VCR (18), cable TV (16), satellite TV (17) and/or game viewing (19) that are allowed and/or blocked fro ...


7
Gee Dave: Device for detecting a certain logical value and decoding device for decoding the priority of address locations from a cam. Music Semiconductors, Gee Dave, ARNOLD Land Addick Adrianus Golsing No 1 Sweelinckplein NL 2517 GK The Hague, October 29, 1992: WO/1992/018981

Device for detecting a certain value of a digital signal from two or more digitally supplied digital signals, for determining whether two or more of these digital signals have said certain value and/or which of the digital signals have said certain value, wherein the device comprises: means for perf ...


8
Grouwstra André Henri: Color palette circuit. Music Semiconductors, Grouwstra André Henri, LAND Addick, October 15, 1992: WO/1992/017876

The present invention provides a circuit for driving three digital/analog converters for three electron guns to provide a picture for a screen (or monitor), said picture comprising color picture-elements (pixels), said circuit comprising: a memory part provided with a look-up table (LUT) in which di ...


9
Feldmeier David C: Accelerated hierarchical address filtering and translation. Music Semiconductors, MACPHERSON Alan H, September 24, 1998: WO/1998/041922

A method and apparatus are provided for performing hierarchical address translation by translating each ternary hierarchical address into a binary addresses and a binary priority mask and storing the binary addresses in the binary CAM. A binary search of the priority masks is then performed by searc ...


10