1
Michael E Giltner, Jack C Mueller, Robert R Fiest: Data compression, encryption, and in-line transmission system. Mostek Corporation, May 31, 1983: US04386416 (316 worldwide citation)

An in-line data compression system which reduces the number of binary bits required to transmit a given text or similar message over a data network such as Telex or TWX. The compression unit can transmit or receive standard messages or can transmit compressed and encrypted messages to remote station ...


2
Robert James Proebsting, Robert Sherman Green: Dynamic random access memory misfet integrated circuit. Mostek Corporation, Hubbard Thurman Turner & Tucker, July 13, 1976: US03969706 (131 worldwide citation)

A MISFET dynamic random access memory chip having 4,096 single transistor, single capacitor storage cells yet packaged in a standard sixteen pin dual inline package is disclosed. Six bit row address and six bit column address data are sequentially multiplexed into row address latches and column addr ...


3
Proebsting Robert J: Low power, high speed, high output voltage fet delay-inverter stage. Mostek Corporation, Hubbard Thurman Turner & Tucker, August 5, 1975: US3898479 (93 worldwide citation)

An integrated circuit and a method operating the circuit is disclosed wherein first and second MISFET transistors are connected with the source node of the first common with the drain node of the second and providing the output node of an inverter or delay stage. The output node is capacitively coup ...


4
Vernon G McKenny, David L Taylor: Block redundancy for memory array. Mostek Corporation, July 28, 1981: US04281398 (85 worldwide citation)

Block redundancy is utilized to improve yield and lower die cost for an electrically programmable read only memory (EPROM). The EPROM is organized 8Kx8 with four primary memory blocks on each side of a central row decoder. Each block includes an array of memory cells, column select, column decode, s ...


5
Paul R Schroeder, Robert J Proebsting: MOSFET buffer for TTL logic input and method of operation. Mostek Corporation, James J Mullen, June 20, 1978: US04096402 (83 worldwide citation)

An input buffer for MOSFET integrated circuit for receiving low level voltage signals even below the threshold voltages of the transistors comprising the circuit is described. A reference voltage between two logic levels of the input voltage, such as TTL logic signals of 0.8 volts and 1.8 volts, is ...


6
Robert S Green: Integrated circuit with threshold regulation. Mostek Corporation, James J Mullen, February 27, 1979: US04142114 (81 worldwide citation)

Threshold voltage regulation of field-effect transistors on a common substrate of an integrated circuit is achieved by adjusting the back bias on the substrate using a charge pump that is selectively operated whenever the threshold voltage of a designated enhancement mode FET falls below a reference ...


7
Daniel C Guterman: Simple NMOS voltage reference circuit. Thomson Components Mostek Corporation, Roland Plottel, September 2, 1986: US04609833 (78 worldwide citation)

A simple, compact voltage reference circuit for an NMOS integrated circuit comprises a series connected depletion transistor with its gate at ground and an enhancement transistor with its gate connected to an output node between the two transistors.


8
Cecil J Aswell: Power supply control for integrated circuit. Mostek Corporation, May 29, 1984: US04451742 (77 worldwide citation)

A power supply control circuit (20) selectively provides power to an integrated circuit from either a primary power supply terminal (22), or through terminals (24, 26) connected to backup batteries. The voltage level of the primary power is monitored continuously and when it drops to a predetermined ...


9
Joseph Link: Integrated circuit package. Mostek Corporation, July 27, 1982: US04342069 (68 worldwide citation)

An integrated semiconductor package containing circuitry capable of supporting separately packaged semiconductors to achieve greater circuit board density and to allow separate semiconductor packages which cooperate with the supporting semiconductor package and die to be interchanged. The supporting ...


10
Douglas P Sheppard: Semiconductor memory circuit. Mostek Corporation, June 14, 1983: US04388705 (64 worldwide citation)

A semiconductor memory circuit (10) has a plurality of word lines (12, 14), column lines (16, 18) and bit lines (20, 22). A memory cell transistor (30) has the gate terminal connected to the word line (12) and the drain and source terminals connected between the bit line (20) and the column line (16 ...