1
Tanaka Takaharu, Mochida Tetsuji, Ichiguchi Nobuyuki: (Ja) 矩形領域に対するバーストメモリアクセス方法, (En) Burst memory access method to rectangular area. Matsushita Electric Industrial, Tanaka Takaharu, Mochida Tetsuji, Ichiguchi Nobuyuki, NII Hiromori, November 17, 2005: WO/2005/109205 (5 worldwide citation)

(EN) An information processor is provided with a memory (1), which is a DRAM having a burst mode for burst transferring data of serial column addresses, masters (13-15) for issuing an access request, and a command processing part (11) for converting an access address included in the access request i ...


2
Mochida Tetsuji, Kiyohara Tokuzo, Yamada Takashi: (Ja) 低バンド幅で局所集中アクセスを保証する調停装置、調停方法、及び調停装置を含む動画処理装置, (En) Administration device for warranting local concentrated access in low-band width, administration method, and animation processing apparatus including the administration device. Matsushita Electric Industrial, Mochida Tetsuji, Kiyohara Tokuzo, Yamada Takashi, NAKAJIMA Shiro, January 5, 2006: WO/2006/001245 (2 worldwide citation)

(EN) An administration device for administrations between master devices so that the individual master devices may access a shared memory with a predetermined band width. In case a specific master device requests an access of a band width equal to or larger than a previously assigned one, the reques ...


3
Mochida Tetsuji, Nakanishi Ryuta, Tanaka Takaharu: (Ja) アクセス制御装置、アクセス制御集積回路、及びアクセス制御方法, (En) Access control device, access control integrated circuit, and access control method. Matsushita Electric Industrial, Mochida Tetsuji, Nakanishi Ryuta, Tanaka Takaharu, NAKAJIMA Shiro, January 11, 2007: WO/2007/004696 (2 worldwide citation)

(EN) In a device in which a master to guarantee an access at a constant rate and a processor to promptly respond to an access request access a common memory, it is possible to improve the promptness of the processor for the access request while guaranteeing the access of the master at a constant rat ...


4
Tanaka Takaharu, Mochida Tetsuji: (Ja) メモリ制御装置及びメモリ制御方法, (En) Memory control apparatus and memory control method. Matsushita Electric Industrial, Tanaka Takaharu, Mochida Tetsuji, MAEDA Hiroshi, December 14, 2006: WO/2006/132006 (2 worldwide citation)

(EN) Access requests issued from access circuits (30,40) are arbitrated by an arbitration circuit (20) to access a storage apparatus (10), while they are arbitrated by an arbitration circuit (21) to access a storage apparatus (11).(JA)  アクセス回路30,40から発行されたアクセス要求を調停回路20で調停して記憶装置10にアクセスする一方、アクセス回路30,40 ...


5
Ichiguchi Nobuyuki, Mochida Tetsuji, Nakanishi Ryuta, Tanaka Takaharu: (Ja) コマンド処理装置、方法、及び集積回路装置, (En) Command processing apparatus, method and integrated circuit apparatus. Matsushita Electric Industrial, Ichiguchi Nobuyuki, Mochida Tetsuji, Nakanishi Ryuta, Tanaka Takaharu, NII Hiromori, July 5, 2007: WO/2007/074555 (1 worldwide citation)

(EN) A command processing apparatus and a command processing method for suitably processing commands that are alternately issued in an asynchronous manner from a plurality of masters to a bank 0 and a bank 1 of a storage device comprising a plurality of banks. A command processing apparatus comprise ...


6
Mochida Tetsuji: (en) Processor, processing system, data sharing processing method, and integrated circuit for data sharing processing(ja) 処理装置、処理システム、データ共有処理方法、及びデータ共有処理用集積回路. Panasonic Corporation, Mochida Tetsuji, NAKAJIMA Shiroet al, September 24, 2009: WO/2009/116279 (1 worldwide citation)

(EN) A processing apparatus for executing processing by sharing data among a plurality of external processing apparatuses, includes a processor, a shared data memory unit for storing one or more data blocks that are shared among one or more external processing apparatuses, an output unit for outputt ...


7
Yamada Takashi, Imoto Daisuke, Asai Koji, Ichiguchi Nobuyuki, Mochida Tetsuji: (Ja) メモリ制御装置、メモリ装置およびメモリ制御方法, (En) Memory control device, memory device, and memory control method. Panasonic Corporation, Yamada Takashi, Imoto Daisuke, Asai Koji, Ichiguchi Nobuyuki, Mochida Tetsuji, NII Hiromori, July 17, 2008: WO/2008/084681

(EN) A memory control device includes: a command generation unit (102) which divides a memory access request issued from a master into access commands for respective memory devices; command issuing units (104, 105) which issue access commands to the memory devices; and a data control unit (106) whic ...


8
Asai Koji, Mochida Tetsuji, Imoto Daisuke, Yamada Takashi, Ohkoshi Wataru: (en) Memory controller, memory system, semiconductor integrated circuit, and memory control method(ja) メモリ制御装置、メモリシステム、半導体集積回路およびメモリ制御方法. Panasonic Corporation, Asai Koji, Mochida Tetsuji, Imoto Daisuke, Yamada Takashi, Ohkoshi Wataru, NII Hiromori, October 29, 2009: WO/2009/130888

(EN) Disclosed is a memory controller (101) provided with: a command generator (102) that generates multiple access commands that include physical addresses, on the basis of address requests, including logical addresses, that indicate rectangular regions within image data; and a command issuer (105) ...