1
Wendell P Noble, Leonard Forbes, Kie Y Ahn: Four F.sup.2 folded bit line DRAM cell structure having buried bit and word lines. Micro Technology, Schwegman Lundberg Woessner & Kluth P A, June 6, 2000: US06072209 (206 worldwide citation)

A memory cell structure for a folded bit line memory array of a dynamic random access memory device includes buried bit and word lines, with the access transistors being formed as a vertical structure on the bit lines. Isolation trenches extend orthogonally to the bit lines between the access transi ...


2
Joseph S Glider, David T Powers, Thomas E Idleman: Data correcting applicable to redundant arrays of independent disks. Micro Technology, Mark D Rowland, Joseph M Guiliano, August 3, 1993: US05233618 (175 worldwide citation)

Methods and apparatus are provided for detecting and correcting various data errors that may arise in a mass data storage apparatus comprising a set of physical mass storage devices operating as one or more larger logical mass storage devices. A method and apparatus is provided for detecting and rec ...


3
Satyan G Pitroda, Krishnappa Ranganath: Universal calling/originating number identification. Micro Technology Wisconsin, Robert J Black, September 20, 1994: US05349638 (164 worldwide citation)

An interface circuit used between a telephone office and a subscriber's telephone operated in response to signals identifying incoming calls to provide visual and/or audible indications of the identification information. The incoming signal information is also extended in decoded form to an associat ...


4
Randy H Katz, David T Powers, David H Jaffe, Joseph S Glider, Thomas E Idleman: Non-volatile memory storage of write operation identifier in data sotrage device. Micro Technology, Mark D Rowland, March 16, 1993: US05195100 (136 worldwide citation)

A method and apparatus are provided for detecting and correcting various data errors that may arise in a mass data storage apparatus comprising a set of physical mass storage devices operating as one or more larger logical mass storage devices. More particularly, there is provided a method and appar ...


5
Thomas E Idleman, Robert S Koontz, David T Powers, David H Jaffe, Larry P Henson, Joseph S Glider, Kumar Gajjar: Disk array system. Micro Technology, Townsend and Townsend Khourie and Crew, December 28, 1993: US05274645 (131 worldwide citation)

A method and apparatus for controlling data flow between a computer and a group of memory devices arranged in a particular logical configuration. The system includes a group of first level controllers and a group of second level controllers. The first level controllers and the second level controlle ...


6
Larry P Henson, Kumar Gajjar, David T Powers, Thomas E Idleman: Failure-tolerant mass storage system. Micro Technology, Townsend and Townsend Khourie and Crew, February 8, 1994: US05285451 (90 worldwide citation)

A mass memory system for digital computers is disclosed. The system has a plurality of disk drives coupled to a plurality of small buffers. An Error Correction Controller is coupled to a plurality of X-bar switches, the X-bar switches being connected between each disk drive and its buffers. Data is ...


7
Scott E Moore: Rotary coupling. Micro Technology, Schwegman Lundberg Woessner & Kluth P A, September 21, 1999: US05954912 (87 worldwide citation)

A rotary coupling for use in an apparatus for chemical mechanical planarization of material substrates. The coupling has a housing defining a chamber therein. A housing passage is formed through the housing and communicates with the chamber and a fluid source. A rotary shaft is connected at one end ...


8
Alexander I Krymski, Kwang Bo Cho: Look ahead rolling shutter system in CMOS sensors. Micro Technology, Dickstein Shapiro Morin & Oshinsky, October 26, 2004: US06809766 (77 worldwide citation)

A shutter system for a pixel array is disclosed. The system includes a read shift register, first and second reset shift registers, and a plurality of logic gates. The read shift register is configured to sequentially count rows of the pixel array from top to bottom, such that the read shift registe ...


9
Kie Y Ahn, Leonard Forbes: films, Atomic layer deposited ZrTiO. Micro Technology, Schwegman Lundberg Woessner & Kluth P A, February 27, 2007: US07183186 (68 worldwide citation)

After pulsing the second purging gas, a zirconium-containing precursor is pulsed into reaction chamber 220, at block 430. In an embodiment, the zirconium-containing precursor is ZTB. In other embodiments, a zirconium-containing precursor includes but is not limited to ZrCl4 and ZrI4. The ZTB precurs ...


10
Chris W Eidler, Hoke S Johnson III, Kaushik S Shah: Method and apparatus for transferring data through a staging memory. Micro Technology, Mark D Rowland, Joseph M Guiliano, May 24, 1994: US05315708 (66 worldwide citation)

A method and apparatus for transferring data from one device interface to another device interface via elements of a staging memory and a direct memory access (DMA) channel.