1
Manouchehr Vafai, Michael D Rostoker: Method and apparatus for significantly improving the reliability of multilevel memory architecture. Kawasaki Steel Corporation, Gerald E Linden, August 21, 2001: US06279133 (233 worldwide citation)

Method and apparatus for significantly improving the reliability of multilevel (MLT) memory architecture. Before writing to MLT architecture, each MLT word is encoded into a coded bit stream in such a way that the resultant coded data contains the original word plus additional digits which are a fun ...


2
Eita Kinoshita, Makoto Mizuno: Semiconductor integrated circuit basic cell semiconductor integrated circuit using the same. Kawasaki Steel Corporation, Oliff & Berridge, February 25, 2003: US06525350 (192 worldwide citation)

A basic cell is disclosed, which is small in area and has sufficient connection flexibility. for achieving a semiconductor integrated circuit with a higher density and a reduced manufacturing cost. In a basic cell, a terminal wire, which is connected to a transistor terminal with a contact, is place ...


3
Norimitsu Sako: Logic circuit utilizing pass transistors and logic gate. Kawasaki Steel Corporation, Oliff & Berridge, July 4, 2000: US06084437 (175 worldwide citation)

A logic circuit combines a plurality of pass-transistor logic trees and a multiple-input logic gate for receiving intermediate logic signals from the respective pass-transistor logic trees, and can express a complex logical operation while decreasing the number of stages in pass-transistor logic tre ...


4
Michael D Rostoker, Kumaraguru Muthukumaraswamy: On-chip antenna, and systems utilizing same. Kawasaki Steel Corporation, Gerald E Linden, April 16, 2002: US06373447 (161 worldwide citation)

One or more antennas are formed on an integrated circuit (IC) chip and connected to other circuitry on the IC chip. Antenna configurations include loop, multi-turn loop, square spiral, long wire, or dipole. The antenna may be formed to have two or more segments which can selectively be connected to ...


5
Yoshihide Tada, Hiroyasu Kunitomo: Manufacturing method for semiconductor devices with source/drain formed in substrate projection.. Kawasaki Steel Corporation, Oliff & Berridge, February 21, 1995: US05391506 (109 worldwide citation)

A projection is formed in a substrate by anisotropic etching and a transistor is contained in the projection. The central portion of the projection covered with a gate electrode is formed as a channel region, and drain and source regions are formed on both sides of the projection by oblique ion impl ...


6
Shusaku Takagi, Kaneaki Tsuzaki, Tadanobu Inoue: Method for setting shape and working stress, and working environment of steel member. Kawasaki Steel Corporation, National Institute For Material Science, Young & Thompson, February 25, 2003: US06523416 (95 worldwide citation)

A delayed fracture is effectively prevented by appropriately setting a shape and working stress, and working environment of a high strength member having more than 1,000 MPa of tensile strength. For this end, the relationship between a maximum value of diffusible hydrogen contents of unfailed specim ...


7
Hisaya Keida: Programmable logic device. Kawasaki Steel Corporation, Oliff & Berridge, October 16, 1990: US04963770 (84 worldwide citation)

In a programmable logic device having a plurality of programmable logic elements (PLEs) where each PLE includes a combinational logic circuit and a plurality of flip-flop circuits, input selector switches for selecting one of a plurality of input signals to be input into a flip-flop circuit are prov ...


8
Masato Yoneda: Semiconductor integrated circuit. Kawasaki Steel Corporation, Oliff & Berridge, April 19, 1994: US05305262 (67 worldwide citation)

A semiconductor integrated circuit has a CAM structure based on nonvolatile memories which is used for forming a flexible CAM of large scale integration. The circuit includes a first memory cell for defining the electrical connection or the nonconnection between a first data line and a match line, a ...


9
Hiromi Shikata, Yoshito Muraishi, Shoichi Moriya, Naoyasu Seki: Method of and apparatus for designing circuit block layout in integrated circuit. Kawasaki Steel Corporation, Oliff & Berridge, May 3, 1994: US05309371 (64 worldwide citation)

There are provided a method of and an apparatus for designing a circuit block layout in an integrated circuit wherein minimization of a total wiring length among the circuit blocks and compaction of the circuit blocks are automatically achieved upon automatically laying out the circuit blocks and de ...


10
Tetsuo Ogawa, Hiroshi Satoh: Data receiving device which enables simultaneous execution of processes of a plurality of protocol hierarchies and generates header end signals. Kawasaki Steel Corporation, Oliff & Berridge, August 10, 1999: US05936966 (61 worldwide citation)

A sequencer 32 is provided with a plurality of protocol processing circuits for independently carrying out at least a part of processes to respective protocol hierarchies of the protocol in response to sequence selection by a sequence selection circuit 28 according to a result of received protocol t ...