Ulrich Klostermann
Daniel Braun, Rainer Leuschner, Ulrich Klostermann: MRAM with magnetic via for storage of information and field sensor. Infineon Technologies, Altis Semiconductor, Dicke Billig & Czaja PLLC, August 15, 2006: US07092284 (46 worldwide citation)

A magnetic memory element is disclosed. The magnetic memory element includes a magnetic via for storing information, made of a magnetic material and being vertically oriented relative to a wafer surface on which the magnetic memory element is formed, the magnetic via having a magnetic anisotropy wit ...

Ulrich Klostermann
Stephen L Brown, Arunava Gupta, Ulrich Klostermann, Stuart Stephen Papworth Parkin, Wolfgang Raberg, Mahesh Samant: Magnetic tunnel junctions for MRAM devices. Infineon Technologies, International Business Machines Corporation, Slater & Matsil L, December 12, 2006: US07149105 (19 worldwide citation)

Methods of manufacturing MTJ memory cells and structures thereof. A diffusion barrier is disposed between an anti-ferromagnetic layer and a pinned layer of an MTJ memory cell to improve thermal stability of the MTJ memory cell. The diffusion barrier may comprise an amorphous material or a NiFe alloy ...

Ulrich Klostermann
Juergen Zimmer, Ulrich Klostermann, Christian Alof: Magnetoresistive sensor element for sensing a magnetic field. Infineon Technologies, Eschweiler & Associates, February 24, 2009: US07495434 (9 worldwide citation)

A magnetoresistive sensor element has a first magnetic layer structure, a second magnetic layer structure, and a barrier layer. The resistance R1 of the first magnetic layer structure, the resistance R2 of the second magnetic layer structure and resistance-area product RA define a characteristic len ...

Ulrich Klostermann
Ulrich Klostermann, Dietmar Gogl: System and method for controlling constant power dissipation. Infineon Technologies, Altis Semiconductor, Slater & Matsil L, August 12, 2008: US07411854 (9 worldwide citation)

A method for controlling the constant power dissipation of a memory cell includes initially measuring the resistance of the memory cell, and subsequently controlling a source to apply a variable level of current or voltage to the memory cell. The variable level of the applied current or voltage is d ...

Ulrich Klostermann
Rainer Leuschner, Daniel Braun, Gill Yong Lee, Ulrich Klostermann: Magnetic memory with static magnetic offset field. Infineon Technologies, Altis Semiconductor, Dicke Billig & Czaja PLLC, July 11, 2006: US07075807 (7 worldwide citation)

A magnetoresistive or magnetic memory element and a magnetic random access memory having one or more magnetic memory elements. The memory element includes a magnetic tunnel junction including first and a second magnetic layers. The first magnetic layer having a free magnetization. The free magnetiza ...

Ulrich Klostermann
Jacques Miltat, Yoshinobu Nakatani, Ulrich Klostermann: Hybrid memory cell for spin-polarized electron current induced switching and writing/reading process using such memory cell. Infineon Technologies, Altis Semiconductor S N C, Centre National de la Recherche Scientifique, Universite Paris Sud, Edell Shapiro & Finnan, December 8, 2009: US07630231 (7 worldwide citation)

A magnetoresistive hybrid memory cell includes first and second stacked structures. The first stacked structure includes a magnetic tunnel junction including first and second magnetic regions stacked in a parallel, overlying relationship separated by a layer of non-magnetic material, wherein the fir ...

Ulrich Klostermann
Daniel Braun, Peter Beer, Rainer Leuschner, Ulrich Klostermann: MRAM with vertical storage element in two layer-arrangement and field sensor. Infineon Technologies, Dicke Billig & Czaja PLLC, August 8, 2006: US07088612 (7 worldwide citation)

A magnetic memory element including a magnetic storage element including two magnetic layers made of magnetic material, said two magnetic layers opposing each other in a parallel relationship and being vertically oriented relative to a wafer surface on which the magnetic memory element is formed, sa ...

Ulrich Klostermann
Chanro Park, Wolfgang Raberg, Ulrich Klostermann: Memory structure and method of manufacture. Infineon Technologies, Atlis Semiconductor, Slater & Matsil L, September 9, 2008: US07423282 (6 worldwide citation)

A solid state electrolyte memory structure includes a solid state electrolyte layer, a metal layer on the solid state electrolyte layer, and an etch stop layer on the metal layer.

Ulrich Klostermann
Manfred Ruehrig, Ulrich Klostermann: MRAM memory cell with a reference layer and method for fabricating. Infineon Technologies, Dicke Billig & Czaha PLLC, December 18, 2007: US07309617 (3 worldwide citation)

The invention relates to a method for fabricating a reference layer for MRAM memory cells and an MRAM memory cell equipped with a reference layer of this type. A reference layer of this type comprises two magnetically coupled layers having a different Curie temperature. When cooling from a temperatu ...

Ulrich Klostermann
Philip Louis Trouilloud, Ulrich Klostermann: Field ramp down for pinned synthetic antiferromagnet. International Business Machines Corporation, Infineon Technologies North America, Ryan Mason & Lewis, June 13, 2006: US07061787 (3 worldwide citation)

Techniques for processing magnetic devices are provided. In one aspect, a method of processing a magnetic device including two or more anti-parallel coupled layers comprises the following steps. A magnetic field is applied in a given direction to orient a direction of magnetization of the two or mor ...