1
David E Cushing, Steven A Tague: Microprogrammable floating point arithmetic unit capable of performing arithmetic operations on long and short operands. Honeywell Information Systems, Faith F Driscoll, Nicholas Prasinos, Ronald T Reiling, July 17, 1979: US04161784 (197 worldwide citation)

A scientific processing unit includes a microprogrammable arithmetic processing apparatus for performing floating point arithmetic operations with operands in long and short form. The apparatus includes a microprogrammable control section and a plurality of microprocessor arithmetic and logic unit c ...


2
Robert P Goldberg: Hardware virtualizer for supporting recursive virtual computer systems on a host computer system. Honeywell Information Systems, Finnegan Henderson Farabow Garrett & Dunner, February 24, 1981: US04253145 (166 worldwide citation)

A hardware virtualizer establishes correspondence between the real process names of the processes executing on a general purpose host computer and the virtual resource names of virtual resources simulated within a plurality of reserved areas of memory of the host computer as duplicates of the real r ...


3
David R Bourgeois, James A Ryan, Subhash C Varshney: Data processing system with self testing and configuration mapping capability. Honeywell Information Systems, Nicholas Prasinos, June 8, 1982: US04334307 (155 worldwide citation)

A data processing system employing firmware for executing a self test routine each time the system goes through the power-up cycle. The self test firmware provides for compilation of a system configuration map during each execution so that configuration and status data is made available for accessin ...


4
Shirish Patel: Method and apparatus for dynamically controlling read/write operations in a peripheral subsystem. Honeywell Information Systems, Faith F Driscoll, Ronald T Reiling, April 13, 1976: US03950735 (154 worldwide citation)

A peripheral subsystem includes a peripheral control unit coupled to a plurality of peripheral devices having different read/write speeds. In response to a command from a central processing unit, the peripheral control unit selects one of the devices designated in the command, and polls the device t ...


5
Nicholas S Lemak: Data mover. Honeywell Information Systems, Edward W Hughes, Wm W Holloway Jr, Ronald T Reiling, October 20, 1981: US04296465 (142 worldwide citation)

A data mover for moving blocks of data stored in a first location of the working store of a data processing system to a second location in the working store. The data mover is provided with the necessary registers, switches, counters and control circuits to issue read and write commands to the worki ...


6
Chandler H McIver: Integrated circuit package. Honeywell Information Systems, Edward W Hughes, Wm W Holloway Jr, L J Marhoefer, March 20, 1984: US04437235 (131 worldwide citation)

An integrated circuit package in which integrated circuit (I.C.) chips having flexible beam leads, the inner lead bond sites of which are bonded to input/output (I/O) terminals on the active faces of the chips, are mounted active face down on a surface of a substrate. The surface of the substrate is ...


7
Jaime Calle, Victor Michael Griswold: Balancing the utilization of I/O system processors. Honeywell Information Systems, Faith F Driscoll, Nicholas Prasinos, Ronald T Reiling, March 21, 1978: US04080649 (128 worldwide citation)

An input/output system couples to a host processor through a system interface unit and includes at least two input/output processing units and a memory unit. The system interface unit includes interrupt processing logic circuits for each input/output processing unit for processing interrupt requests ...


8
Bartek Douglas J, Howell Thomas H: Nonlinear code generator and decoder for transmitting data securely. Honeywell Information Systems, Hughes Edward W, October 7, 1975: US3911216 (122 worldwide citation)

A code generator for encoding digital data includes a first feedback shift register for code generation and at least a second feedback shift register interconnected with the first shift register whereby the generated code is effectively nonlinear. Clear text may be applied as an input to the first s ...


9
Ronald E Lange, Richard J Fisher: Cache memory utilizing selective clearing and least recently used updating. Honeywell Information Systems, Wm W Holloway Jr, L J Marhoefer, N Prasinos, March 30, 1982: US04322795 (118 worldwide citation)

An apparatus is disclosed herein for providing faster memory access for a CPU by utilizing a least recently used scheme for selecting a storage location in which to store data retrieved from main memory upon a cache miss. A duplicate directory arrangement is also disclosed for selective clearing of ...


10
Daniel A Boudreau, James M Sandini, Edward R Salas: Lockout operation among asynchronous accessers of a shared computer system resource. Honeywell Information Systems, William A Linnell, George Grayson, John S Solakian, May 6, 1986: US04587609 (113 worldwide citation)

A data processing system having a plurality of units includes a shareable unit which is shareable between two or more of the other units. Lock apparatus is provided in the shareable unit to allow a first unit to lock the shareable unit so that no other unit attempting to lock the shareable unit will ...