1
Masayuki Watanabe, Toshio Sugano, Seiichiro Tsukui, Takashi Ono, Yoshiaki Wakashima: Semiconductor integrated circuit device and method of manufacturing the same. Hitachi, Hitachi Tobu Semiconductor, Akita Electronics, Pennie & Edmonds, January 1, 1991: US04982265 (350 worldwide citation)

In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat ...


2
Toshio Sugano, Kohji Nagaoka, Seiichiro Tsukui, Yoshiaki Wakashima, Michio Tanimoto, Masayuki Watanabe, Suguru Sakaguchi, Kunihiko Nishi, Aizo Kaneda, Kohji Serizawa, Michiharu Honda, Tohru Yoshida, Takeshi Komaru, Atsushi Nakamura: Semiconductor stacked device. Hitachi, Hitachi Tobu Semiconductor, Antonelli Terry Stout & Kraus, March 30, 1993: US05198888 (173 worldwide citation)

There is a trend to increase that area of a device requiring a memory of large capacity, which is occupied by a semiconductor memory. This trend obstructs reduction of the size of the device. The present invention contemplates to provide a memory which can have a high integration, a high density and ...


3
Toshio Sugano, Kohji Nagaoka, Seiichiro Tsukui, Yoshiaki Wakashima, Michio Tanimoto, Masayuki Watanabe, Suguru Sakaguchi, Kunihiko Nishi, Aizo Kaneda, Kohji Serizawa, Michiharu Honda, Tohru Yoshida, Takeshi Komaru, Atsushi Nakamura: Stacked semiconductor memory device and semiconductor memory module containing the same. Hitachi, Hitachi Tobu Semiconductor, Antonelli Terry Stout & Kraus, August 2, 1994: US05334875 (62 worldwide citation)

There is a trend to increase that area of a device requiring a memory of large capacity, which is occupied by a semiconductor memory. This trend obstructs reduction of the size of the device. The present invention contemplates to provide a memory which can have a high integration, a high density and ...


4
Toshihiro Yasuhara, Masachika Masuda, Gen Murakami, Kunihiko Nishi, Masanori Sakimoto, Ichio Shimizu, Akio Hoshi, Sumio Okada, Tooru Nagamine: Resin-encapsulated semiconductor device having a particular mounting structure. Hitachi, Hitachi Tobu Semiconductor, Antonelli Terry Stout & Kraus, September 22, 1992: US05150193 (58 worldwide citation)

The present invention consists in that a through hole of large area is provided in a die pad or a tab, thereby to prevent a resin from cracking at the rear surface of a surface-packaging resin package in a high-temperature soldering atmosphere of vapor-phase reflow or the like, whereby a resin-molde ...


5
Masayuki Watanabe, Toshio Sugano, Seiichiro Tsukui, Takashi Ono, Yoshiaki Wakashima: Semiconductor memory module having double-sided stacked memory chip layout. Hitachi, Hitachi Tobu Semiconductor, Akita Electronics, Pennie & Edmonds, June 8, 1999: US05910685 (52 worldwide citation)

In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat ...


6
Watanabe Masayuki, Sugano Toshio, Tsukui Seiichiro, Ono Takashi, Wakashima Yoshiaki: Semiconductor memory module having double-sided stacked memory chip layout. Hitachi, Hitachi Tobu Semiconductor, Akita Electronics, Pennie & Edmonds, January 13, 1998: US05708298 (42 worldwide citation)

In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat ...


7
Watanabe Masayuki, Sugano Toshio, Tsukui Seiichiro, Ono Takashi, Wakashima Yoshiaki: Semiconductor memory module having double-sided memory chip layout. Hitachi, Hitachi Tobu Semiconductor, Akita Electronics, Pennie & Edmonds, July 17, 2001: US06262488 (41 worldwide citation)

In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat ...


8
Yasushi Takizawa, Atsushi Sasayama, Yoshihiko Kobayashi, Yukio Takahashi, Yuuji Kakegawa: Optoelectronics device. Hitachi, Hitachi Tobu Semiconductor, Antonelli Terry & Wands, August 30, 1988: US04768070 (40 worldwide citation)

An optoelectronics device wherein a light-receiving element which defines a monitor light receiver and a semiconductor laser which generates a laser beam are hermetically sealed in the same package, and wherein the light-receiving surface of the element for measuring the output power of the beam of ...


9
Kunio Aiki, Atsushi Sasayama, Tugio Nemoto, Makoto Haneda, Satoru Ishii, Haruo Kugimiya, Tutomu Kawasaki: Method of mounting a light emitting chip and an optical fiber on a photoelectric device. Hitachi, Hitachi Tobu Semiconductor, Antonelli Terry Stout & Kraus, March 5, 1991: US04997243 (39 worldwide citation)

In a photoelectric device, particularly, a photoelectric device for optical communication, an optical fiber is fixed at two fixing points so that the extremity of the optical fiber is disposed opposite to the light emitting surface of a laser diode chip and the optical fiber extends in a nonlinear s ...


10
Watanabe Masayuki, Sugano Toshio, Tsukui Seiichiro, Ono Takashi, Wakashima Yoshiaki: Process for manufacturing a stacked integrated circuit package. Hitachi, Hitachi Tobu Semiconductor, Akita Electronics, Pennie & Edmonds, December 24, 1996: US05587341 (37 worldwide citation)

In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat ...